SONIX SN8P2203 User manual

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 1 Version1.7
SN8P2200 Series
USER’S MANUAL
SN8P2204
SN8P2203
SN8P2202
SN8P22021
SN8P2201
S
SO ON Ni iX X 8 8- -B Bi it t M Mi ic cr ro o- -C Co on nt tr ro ol ll le er r
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 2 Version1.7
AMENDMENT HISTORY
Version Date Description
VER 0.1 Aug. 2005 1. First issue.
2. ADD BROWN-OUT circuit.
VER 0.2 Dec. 2005
1. Modify Topr value.
2. Modify Brown-Out Reset description.
3. Modify M2IDE 1.08
4. Remove power consumption(Pc)
5. Modify ELECTRICAL CHARACTERISTIC.
VER 0.3 Feb. 2006
1. Modify operating voltage 3.0V~5.5V.
2. Modify UPID register bit definition of register table.
3. Modify UBDE bit definition, 0:disable, 1: enable.
4. Update IDE display picture of development tools section.
5. Modify OTP program pin number of section 14.
VER1.0 Nov. 2006
1. Modify ELECTRICAL CHARACTERISTIC.
2. Modify USB register naming
3. Modify code option IHRC description
4. Modify P0UR register
VER1.1 Jan.2007
1. Modify PS2 Host to device diagram
VER1.3 Nov. 2007
1.Modify 9.5.3 UE1R to UE3R’s bit description
VER1.3k Nov.2007
Modify chapter 13. The minimum working voltage of USB mode = 3.6 volts and the
VREG voltage will between 3.2 ~ 3.5 volts.
VER1.4 Dec.2007
1. Modify chapter 13. Typing error.
2. Add new 2201 QFN package
VER1.5 Feb.2008
Modify chapter 13. The minimum working voltage of USB mode = 3.3 volts and the
VREG voltage will between 3.1 ~ 3.5 volts.
VER1.6 Mar. 2008
1. Modify the 9.5.10 the USTATUS register bit 6’s description.
2. Add chapter 16 marking definition
VER1.7 May. 2008
Add SN8P22021

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 3 Version1.7
Table of Content
AMENDMENT HISTORY............................................................................................................................ 2
1 PRODUCT OVERVIEW.............................................................................................................................. 8
1.1 FEATURES.............................................................................................................................................. 8
1.2 SYSTEM BLOCK DIAGRAM ................................................................................................................ 9
1.3 PIN ASSIGNMENT ............................................................................................................................... 10
1.4 PIN DESCRIPTIONS............................................................................................................................. 13
1.5 PIN CIRCUIT DIAGRAMS................................................................................................................... 14
2 CENTRAL PROCESSOR UNIT (CPU) ................................................................................................... 15
2.1 MEMORY MAP..................................................................................................................................... 15
2.1.1 PROGRAM MEMORY (ROM) ........................................................................................................ 15
2.1.1.1 RESET VECTOR (0000H) ...................................................................................................... 16
2.1.1.2 INTERRUPT VECTOR (0008H)............................................................................................. 17
2.1.1.3 LOOK-UP TABLE DESCRIPTION........................................................................................ 19
2.1.1.4 JUMP TABLE DESCRIPTION............................................................................................... 21
2.1.1.5 CHECKSUM CALCULATION .............................................................................................. 23
2.1.2 CODE OPTION TABLE.................................................................................................................. 24
2.1.3 DATA MEMORY (RAM).................................................................................................................. 25
2.1.4 SYSTEM REGISTER........................................................................................................................ 26
2.1.4.1 SYSTEM REGISTER TABLE ................................................................................................ 26
2.1.4.2 SYSTEM REGISTER DESCRIPTION ................................................................................... 26
2.1.4.3 BIT DEFINITION of SYSTEM REGISTER........................................................................... 27
2.1.4.4 ACCUMULATOR ................................................................................................................... 29
2.1.4.5 PROGRAM FLAG................................................................................................................... 30
2.1.4.6 PROGRAM COUNTER .......................................................................................................... 31
2.1.4.7 Y, Z REGISTERS .................................................................................................................... 34
2.1.4.8 R REGISTERS......................................................................................................................... 35
2.2 ADDRESSING MODE .......................................................................................................................... 36
2.2.1 IMMEDIATE ADDRESSING MODE.............................................................................................. 36
2.2.2 DIRECTLY ADDRESSING MODE................................................................................................. 36
2.2.3 INDIRECTLY ADDRESSING MODE............................................................................................. 36
2.3 STACK OPERATION............................................................................................................................ 37
2.3.1 OVERVIEW ..................................................................................................................................... 37
2.3.2 STACK REGISTERS........................................................................................................................ 38
2.3.3 STACK OPERATION EXAMPLE.................................................................................................... 39
3 RESET.......................................................................................................................................................... 40

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 4 Version1.7
3.1 OVERVIEW........................................................................................................................................... 40
3.2 POWER ON RESET............................................................................................................................... 42
3.3 WATCHDOG RESET............................................................................................................................ 42
3.4 BROWN OUT RESET ........................................................................................................................... 43
3.4.1 BROWN OUT DESCRIPTION........................................................................................................ 43
3.4.2 THE SYSTEM OPERATING VOLTAGE DECSRIPTION............................................................... 44
3.4.3 BROWN OUT RESET IMPROVEMENT......................................................................................... 45
3.5 EXTERNAL RESET .............................................................................................................................. 46
3.6 EXTERNAL RESET CIRCUIT ............................................................................................................. 46
3.6.1 Simply RC Reset Circuit.................................................................................................................. 46
3.6.2 Diode & RC Reset Circuit............................................................................................................... 47
3.6.3 Zener Diode Reset Circuit............................................................................................................... 47
3.6.4 Voltage Bias Reset Circuit............................................................................................................... 48
3.6.5 External Reset IC............................................................................................................................. 48
4 SYSTEM CLOCK....................................................................................................................................... 49
4.1 OVERVIEW........................................................................................................................................... 49
4.2 CLOCK BLOCK DIAGRAM................................................................................................................. 49
4.3 OSCM REGISTER................................................................................................................................. 50
4.4 SYSTEM HIGH CLOCK ....................................................................................................................... 51
4.4.1 INTERNAL HIGH RC...................................................................................................................... 51
4.4.2 EXTERNAL HIGH CLOCK............................................................................................................. 51
4.4.2.1 CRYSTAL/CERAMIC............................................................................................................. 51
4.5 SYSTEM LOW CLOCK ........................................................................................................................ 52
4.5.1 SYSTEM CLOCK MEASUREMENT............................................................................................... 53
5 SYSTEM OPERATION MODE................................................................................................................ 54
5.1 OVERVIEW........................................................................................................................................... 54
5.2 SYSTEM MODE SWITCHING EXAMPLE......................................................................................... 55
5.3 WAKEUP ............................................................................................................................................... 57
5.3.1 OVERVIEW ..................................................................................................................................... 57
5.3.2 WAKEUP TIME............................................................................................................................... 57
6 INTERRUPT................................................................................................................................................ 58
6.1 OVERVIEW........................................................................................................................................... 58
6.2 INTEN INTERRUPT ENABLE REGISTER......................................................................................... 59
6.3 INTRQ INTERRUPT REQUEST REGISTER....................................................................................... 60
6.4 GIE GLOBAL INTERRUPT OPERATION .......................................................................................... 60
6.5 PUSH, POP ROUTINE........................................................................................................................... 61
6.6 INT0 (P0.0) INTERRUPT OPERATION............................................................................................... 62
6.7 T0 INTERRUPT OPERATION.............................................................................................................. 64

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 5 Version1.7
6.8 TC0 INTERRUPT OPERATION........................................................................................................... 65
6.9 USB INTERRUPT OPERATION .......................................................................................................... 66
6.10 T1 INTERRUPT OPERATION............................................................................................................ 67
6.11 T2 INTERRUPT OPERATION............................................................................................................ 68
6.12 MULTI-INTERRUPT OPERATION................................................................................................... 69
7 I/O PORT..................................................................................................................................................... 70
7.1 I/O PORT MODE ................................................................................................................................... 70
7.2 I/O PULL UP REGISTER ...................................................................................................................... 71
7.3 I/O OPEN-DRAIN REGISTER.............................................................................................................. 72
7.4 I/O PORT DATA REGISTER ................................................................................................................ 73
8 TIMERS ....................................................................................................................................................... 74
8.1 WATCHDOG TIMER............................................................................................................................ 74
8.2 TIMER 0(T0)......................................................................................................................................... 76
8.2.1 OVERVIEW ..................................................................................................................................... 76
8.2.2 T0M MODE REGISTER.................................................................................................................. 77
8.2.3 T0C COUNTING REGISTER.......................................................................................................... 78
8.2.4 T0 TIMER OPERATION SEQUENCE............................................................................................ 79
8.3 TIMER/COUNTER 0(TC0)................................................................................................................... 80
8.3.1 OVERVIEW ..................................................................................................................................... 80
8.3.2 TC0M MODE REGISTER............................................................................................................... 81
8.3.3 TC0C COUNTING REGISTER....................................................................................................... 82
8.3.4 TC0R AUTO-LOAD REGISTER ..................................................................................................... 83
8.3.5 TC0 CLOCK FREQUENCY OUTPUT (BUZZER)......................................................................... 84
8.3.6 TC0 TIMER OPERATION SEQUENCE ......................................................................................... 85
8.4 PWM0 MODE ........................................................................................................................................ 86
8.4.1 OVERVIEW ..................................................................................................................................... 86
8.4.2 TCxIRQ and PWM Duty.................................................................................................................. 87
8.4.3 PWM Duty with TCxR Changing..................................................................................................... 88
8.4.4 PWM PROGRAM EXAMPLE ......................................................................................................... 89
8.5 T1, T2 8-BIT TIMER CAPTURE........................................................................................................... 90
8.5.1 OVERVIEW ..................................................................................................................................... 90
8.5.2 TnM MODE REGISTER.................................................................................................................. 91
8.5.3 Tn COUNTING REGISTER ............................................................................................................ 91
8.5.4 Tn TIMER CAPTURE OPERATION............................................................................................... 92
8.5.5 Tn INPUT PERIOD MEASUREMENT ........................................................................................... 93
8.5.6 Tn INPUT PULSE WIDTH MEASUREMENT................................................................................ 95
9 UNIVERSAL SERIAL BUS (USB) ........................................................................................................... 97
9.1 OVERVIEW........................................................................................................................................... 97

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 6 Version1.7
9.2 USB MACHINE..................................................................................................................................... 97
9.3 USB INTERRUPT.................................................................................................................................. 98
9.4 USB ENUMERATION .......................................................................................................................... 99
9.5 USB REGISTERS .................................................................................................................................. 99
9.5.1 USB DEVICE ADDRESS REGISTER ............................................................................................. 99
9.5.2 USB ENDPOINT 0 ENABLE REGISTER ..................................................................................... 100
9.5.3 USB ENDPOINT 1 ENABLE REGISTER ..................................................................................... 101
Example: Check the Endpoint 1’s IN request......................................................................................... 101
Example: Check the Endpoint 1’s OUT request..................................................................................... 102
9.5.4 USB ENDPOINT 2 ENABLE REGISTER ..................................................................................... 102
9.5.5 USB ENDPOINT 3 ENABLE REGISTER ..................................................................................... 103
9.5.6 USB DATA POINTER 0 REGISTER............................................................................................. 103
9.5.7 USB DATA REGISTER.................................................................................................................. 105
9.5.8 USB DATA POINTER 1 REGISTER............................................................................................. 105
9.5.9 USB DATA REGISTER.................................................................................................................. 105
9.5.10 USB STATUS REGISTER............................................................................................................ 105
9.5.11 UPID REGISTER ........................................................................................................................ 106
10 PS/2 INTERFACE................................................................................................................................... 107
10.1 OVERVIEW....................................................................................................................................... 107
10.2 PS/2 OPERATION ............................................................................................................................. 107
10.3 PS2_1 DESCRIPITON....................................................................................................................... 108
10.4 PS2_2 DESCRIPITON....................................................................................................................... 109
11 INSTRUCTION TABLE ........................................................................................................................ 110
12 DEVELOPMENT TOOL....................................................................................................................... 111
12.1 ICE (IN CIRCUIT EMULATION)............................................................................................................. 111
12.2 SN8P2200 EV-KIT .............................................................................................................................. 113
12.3 ICE AND EV-KIT APPLICATION NOTIC........................................................................................ 115
12.4 IDE (INTEGRATED DEVELOPMENT ENVIRONMENT)............................................................................. 116
13 ELECTRICAL CHARACTERISTIC................................................................................................... 117
13.1 ABSOLUTE MAXIMUM RATING.................................................................................................. 117
13.2 ELECTRICAL CHARACTERISTIC................................................................................................. 117
14 OTP PROGRAMMING PIN.................................................................................................................. 118
14.1 THE PIN ASSIGNMENT OF EASY WRITER TRANSITION BOARD SOCKET.......................... 118
14.2 PROGRAMMING PIN MAPPING.................................................................................................... 119
15 PACKAGE INFORMATION ................................................................................................................ 120
15.1 SK-DIP 28 PIN ................................................................................................................................... 120

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 7 Version1.7
15.2 SK-DIP 24 PIN ................................................................................................................................... 121
15.3 P-DIP 18 PIN ...................................................................................................................................... 122
15.4 P-DIP 14 PIN ...................................................................................................................................... 123
15.5 SOP 28 PIN......................................................................................................................................... 124
15.6 SOP 24 PIN......................................................................................................................................... 125
15.7 SOP 20 PIN......................................................................................................................................... 126
15.8 SOP 18 PIN......................................................................................................................................... 127
15.9 SOP 14 PIN......................................................................................................................................... 128
15.10 SSOP 28 PIN..................................................................................................................................... 129
15.11 SSOP 24 PIN..................................................................................................................................... 130
15.12 SSOP 20 PIN..................................................................................................................................... 131
15.13 SSOP 16 PIN..................................................................................................................................... 132
15.14 QFN 16 PIN ...................................................................................................................................... 133
16 MARKING DEFINITION...................................................................................................................... 134
16.1 INTRODUCTION.............................................................................................................................. 134
16.2 MARKING INDETIFICATION SYSTEM........................................................................................ 134
16.3 MARKING EXAMPLE...................................................................................................................... 135
16.4 DATECODE SYSTEM ...................................................................................................................... 135

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 8 Version1.7
1 PRODUCT OVERVIEW
1.1 FEATURES
)Features Selection Table
TIMER PWM
CHIP ROM RAM STACK T0 TC0 T1 T2 PS/2 BZ I/O WAKE-UP
PIN NO. PACKAGE
SN8P2204 6K*16 256*8 8 V V V V 2 1 23 15 SKDIP28/SOP28/SSOP28
SN8P2203 6K*16 256*8 8 V V V V 2 1 19 11 SKDIP24/SOP24/SSOP24
SN8P2202 6K*16 256*8 8 V V V V 2 1 13 8 PDIP18/SOP18/SSOP20
SN8P22021 6K*16 256*8 8 V V V V 2 1 15 10 SOP20
SN8P2201 6K*16 256*8 8 V V - - 2 1 9 6 PDIP14/SOP14/SSOP16/QFN16
♦Memory configuration ♦Two PS/2 interface.
OTP ROM size: 6K * 16 bits.
RAM size: 256 * 8 bits. ♦6 interrupt sources.
Three internal interrupts: T0, TC0, USB, T1, T2.
♦8 levels stack buffer One external interrupt: INT0.
♦I/O pin configuration ♦Two 8-bit timer captures.
Bi-directional: P0, P1, P5. T1 input from P0.1.
Wake-up: P0/P1 level change. T2 input from P0.2.
Pull-up resistors: P0, P1, P5
Open-drain: P1.0, P1.1. ♦One channel PWM output. (PWM)
External interrupt: P0.0 controlled by PEDGE. ♦One channel Buzzer output. (BZ0)
Timer capture input pin: P0.1, P0.2 controlled ♦Two 8-bit timer counters. (T0, TC0)
by TnG1,0. ♦0.5 sec RTC.
♦On chip watchdog timer.
♦Low Speed USB 1.1.
Conforms to USB HID specification, Version 1.1. ♦Three system clocks.
3.3V regulator output for USB D- pin external External high clock: Crystal type 6MHz.
1.5k ohm pull-up resistor. Internal high RC 6MHz.
Integrated USB transceiver. Internal low clock: RC type 16KHz @3V, 32KHz (5V).
Supports 1 low speed USB device address and
4 data endpoints (include endpoint 0). ♦Four operating modes.
Normal mode: Both high and low clocks active.
♦Powerful instructions Slow mode: Low clock only.
One clocks per instruction cycle (1T) Sleep: Both high and low clocks stop.
Most of instructions are one cycle only. Green mode: Periodical wakeup by timer.
All ROM area JMP instruction.
All ROM area CALL address instruction. ♦Package (Chip form support)
All ROM area lookup table function (MOVC) SK-DIP/P-DIP: 28/24/18/14
SOP: 28/24/20/18/14
SSOP: 28/24/20/16
QFN: 16

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 9 Version1.7
1.2 SYSTEM BLOCK DIAGRAM
INTERRUPT
CONTROL
EXTERNAL
HIGH OSC.
ACC
INTERNAL
LOW RC
INTERNAL
6M RC
TIMING GENERATOR
RAM
SYSTEM REGISTERS
LVD
WATCHDOG TIMER
TIMER & COUNTER
P0 P5P1
PWM 0BUZZER 0
ALU
PC
FLAGS
IR
OTP
ROM
PWM0BUZZER0
USB ENGINE
3.3v REGULATOR VREG
D+
D-
PS2_1 SCLK
PS2_1 SDATA
PS2_2 SCLK
PS2_2 SDATA

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 10 Version1.7
1.3 PIN ASSIGNMENT
SN8P2204K (SK-DIP 28 pins)
SN8P2204S (SOP 28 pins)
SN8P2204X (SSOP 28 pins)
P1.0 1 U 28 P5.4/BZ0/PWM0
P1.1 2 27 P5.3
P1.5 3 26 P5.2
P1.6 4 25 P5.1
P1.7 5 24 P5.0
P0.4 6 23 P5.5
P0.3 7 22 P5.6
P0.2/T2IN 8 21 P5.7
P0.1/T1IN 9 20 P0.6
P0.0/INT0 10 19 P0.5
VSS 11 18 D+/SCLK
P1.4/RST/VPP 12 17 D-/SDATA
VREG 13 16 VDD
P1.3/XIN 14 15 P1.2/XOUT
SN8P2204K
SN8P2204S
SN8P2204X
SN8P2203K (SK-DIP 24 pins)
SN8P2203S (SOP 24 pins)
SN8P2203X (SSOP 24 pins)
P1.0 1 U 24 P5.4/BZ0/PWM0
P1.1 2 23 P5.3
P1.5 3 22 P5.2
P1.6 4 21 P5.1
P1.7 5 20 P5.0
P0.2/T2IN 6 19 P5.5
P0.1/T1IN 7 18 P5.6
P0.0/INT0 8 17 P5.7
VSS 9 16 D+/SCLK
P1.4/RST/VPP 10 15 D-/SDATA
VREG 11 14 VDD
P1.3/XIN 12 13 P1.2/XOUT
SN8P2203K
SN8P2203S
SN8P2203X

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 11 Version1.7
SN8P2202P (P-DIP 18 pins)
SN8P2202S (SOP 18 pins)
SN8P2202X (SSOP 20 pins)
P1.0 1 U 18 P5.4/BZ0/PWM0
P1.1 2 17 P5.3
P0.2/T2IN 3 16 P5.2
P0.1/T1IN 4 15 P5.1
P0.0/INT0 5 14 P5.0
VSS 6 13 D+/SCLK
P1.4/RST/VPP 7 12 D-/SDATA
VREG 8 11 VDD
P1.3/XIN 9 10 P1.2/XOUT
SN8P2202P
SN8P2202S
NC 1 U 20 NC
P1.0 2 19 P5.4/BZ0/PWM0
P1.1 3 18 P5.3
P0.2/T2IN 4 17 P5.2
P0.1/T1IN 5 16 P5.1
P0.0/INT0 6 15 P5.0
VSS 7 14 D+/SCLK
P1.4/RST/VPP 8 13 D-/SDATA
VREG 9 12 VDD
P1.3/XIN 10 11 P1.2/XOUT
SN8P2202X
SN8P22021S (SOP 20 pins)
P1.1 1 U 20 P1.0
P1.5 2 19 P5.4/BZ0/PWM0
P1.6 3 18 P5.3
P0.2/T2IN 4 17 P5.2
P0.1/T1IN 5 16 P5.1
P0.0/INT0 6 15 P5.0
VSS 7 14 D+/SCLK
P1.4/RST/VPP 8 13 D-/SDATA
VREG 9 12 VDD
P1.3/XIN 10 11 P1.2/XOUT
SN8P22021S

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 12 Version1.7
SN8P2201P (P-DIP 14 pins)
SN8P2201S (SOP 14 pins)
SN8P2201X (SSOP 16 pins)
SN8P2201J (QFN 16 pins)
P1.0 1 U 14 P5.4/BZ0/PWM0
P1.1 2 13 P5.1
P0.0/INT0 3 12 P5.0
VSS 4 11 D+/SCLK
P1.4/RST/VPP 5 10 D-/SDATA
VREG 6 9 VDD
P1.3/XIN 7 8 P1.2/XOUT
SN8P2201P
SN8P2201S
NC 1 U 16 NC
P1.0 2 15 P5.4/BZ0/PWM0
P1.1 3 14 P5.1
P0.0/INT0 4 13 P5.0
VSS 5 12 D+/SCLK
P1.4/RST/VPP 6 11 D-/SDATA
VREG 7 10 VDD
P1.3/XIN 8 9 P1.2/XOUT
SN8P2201X
P5.4/BZ0/PWM0 P5.2 P5.1 P5.0
16 15 14 13
P1.0 1 ●12 D+/SCLK
P1.1 2 11 D-/SDATA
P0.1 3 SN8P2201J 10 VDD
P0.0/INT0 4 9 P1.2/XOUT
5678
VSS
P1.4/RST/VPP
VREG
P1.3/XIN

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 13 Version1.7
1.4 PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
VDD, VSS P Power supply input pins for digital circuit.
P0.0/INT0 I/O
P0.0: Port 0.0 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
INT0: External interrupt 0 input pin.
P0.1/T1IN I/O
P0.1: Port 0.1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
T1IN: T1 timer capture input pin.
P0.2/T2IN I/O
P0.2: Port 0.1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
T2IN: T2 timer capture input pin.
P0[6:3] I/O
P0: Port 0 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
P1.0 I/O
P1.0: Port 1.0 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Open-Drain function controlled by “P1OC” register.
Built wakeup function.
P1.1 I/O
P1.1: Port 1.1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Open-Drain function controlled by “P1OC” register.
Built wakeup function.
P1.2/XOUT I/O
XOUT: Oscillator output pin while external crystal enable.
P1.2: Port 1.2 bi-direction pin under internal 16M RC and external RC.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
P1.3/XIN I/O
XIN: Oscillator input pin while external oscillator enable (crystal and RC).
P1.3: Port 1.3 bi-direction pin under internal 16M RC.
Schmitt trigger structure and built-in pull-up resisters as input mode.
P1.4/RST/VPP I, P
RST is system external reset input pin under Ext_RST mode.
Schmitt trigger structure, active “low”, normal stay to “high”.
P1.4 is input only pin without pull-up resistor under P1.4 mode. Add the 100
ohm external resistor on P1.4, when it is set to be input pin.
Built wakeup function.
OTP 12.3V power input pin in programming mode.
P1[7:5] I/O
P1: Port 1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
P5.0 I/O
P5.0: Port 5.0 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
P5.1 I/O
P5.1: Port 5.1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
P5.4/BZ0/PWM0 I/O
P5.4: Port 5.4 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
BZ0: 1/2 TC0 counter output pin.
PWM0: PWM0 output.
P5[7:2] I/O
P5: Port 5 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
VREG O 3.3V voltage output from USB 3.3V regulator.
D+, D- I/O USB differential data line.
SCLK, SDATA I/O PS/2 clock and data lines.

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 14 Version1.7
1.5 PIN CIRCUIT DIAGRAMS
Port 0, 1, 5 structure:
Pull-Up
Pin
Output
Latch
PnM, PnUR
Input Bus
PnM
Output Bus
Port 1.0,Port 1.1 structure:
Pull-Up
Pin
Output
Latch
PnM, PnUR
Input Bus
PnM
Output Bus
P1OC
Open-Drain
Port 1.2, 1.3 structure:
Oscillator
Code Option
Int. Osc.
Pull-Up
Pin
Output
Latch
PnM, PnUR
Input Bus
PnM
Output Bus
Port 1.4 structure:
Pin
Ext. Reset
Code Option
Int. Bus
Int. Rst

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 15 Version1.7
2 CENTRAL PROCESSOR UNIT (CPU)
2.1 MEMORY MAP
2.1.1 PROGRAM MEMORY (ROM)
)6K words ROM
ROM
0000H Reset vector User reset vector
Jump to user start address
0001H
.
.
0007H
General purpose area
0008H Interrupt vector User interrupt vector
0009H User program
.
.
000FH
0010H
0011H
.
.
.
.
.
17FCH
General purpose area
End of user program
17FDH
17FEH
17FFH
Reserved

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 16 Version1.7
2.1.1.1RESET VECTOR (0000H)
A one-word vector address area is used to execute system reset.
)Power On Reset (NT0=1, NPD=0).
)Watchdog Reset (NT0=0, NPD=0).
)External Reset (NT0=1, NPD=1).
After power on reset, external reset or watchdog timer overflow reset, then the chip will restart the program from
address 0000h and all system registers will be set as default values. It is easy to know reset status from NT0, NPD
flags of PFLAG register. The following example shows the way to define the reset vector in the program memory.
¾Example: Defining Reset Vector
ORG 0 ; 0000H
JMP START ; Jump to user program address.
…
ORG 10H
START: ; 0010H, The head of user program.
… ; User program
…
ENDP ; End of program

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 17 Version1.7
2.1.1.2INTERRUPT VECTOR (0008H)
A 1-word vector address area is used to execute interrupt request. If any interrupt service executes, the program
counter (PC) value is stored in stack buffer and jump to 0008h of program memory to execute the vectored interrupt.
Users have to define the interrupt vector. The following example shows the way to define the interrupt vector in the
program memory.
Note: ”PUSH”, “POP” instructions save and load ACC/PFLAG without (NT0, NPD). PUSH/POP buffer is a
unique buffer and only one level.
¾Example: Defining Interrupt Vector. The interrupt service routine is following ORG 8.
.CODE
ORG 0 ; 0000H
JMP START ; Jump to user program address.
…
ORG 8 ; Interrupt vector.
PUSH ; Save ACC and PFLAG register to buffers.
…
…
POP ; Load ACC and PFLAG register from buffers.
RETI ; End of interrupt service routine
…
START: ; The head of user program.
… ; User program
…
JMP START ; End of user program
…
ENDP ; End of program

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 18 Version1.7
¾Example: Defining Interrupt Vector. The interrupt service routine is following user program.
.CODE
ORG 0 ; 0000H
JMP START ; Jump to user program address.
…
ORG 8 ; Interrupt vector.
JMP MY_IRQ ; 0008H, Jump to interrupt service routine address.
ORG 10H
START: ; 0010H, The head of user program.
… ; User program.
…
…
JMP START ; End of user program.
…
MY_IRQ: ;The head of interrupt service routine.
PUSH ; Save ACC and PFLAG register to buffers.
…
…
POP ; Load ACC and PFLAG register from buffers.
RETI ; End of interrupt service routine.
…
ENDP ; End of program.
Note: It is easy to understand the rules of SONIX program from demo programs given above. These
points are as following:
1. The address 0000H is a “JMP” instruction to make the program starts from the beginning.
2. The address 0008H is interrupt vector.
3. User’s program is a loop routine for main purpose application.

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 19 Version1.7
2.1.1.3LOOK-UP TABLE DESCRIPTION
In the ROM’s data lookup function, Y register is pointed to middle byte address (bit 8~bit 15) and Z register is pointed
to low byte address (bit 0~bit 7) of ROM. After MOVC instruction executed, the low-byte data will be stored in ACC and
high-byte data stored in R register.
¾Example: To look up the ROM data located “TABLE1”.
B0MOV Y, #TABLE1$M ; To set lookup table1’s middle address
B0MOV Z, #TABLE1$L ; To set lookup table1’s low address.
MOVC ; To lookup data, R = 00H, ACC = 35H
; Increment the index address for next address.
INCMS Z ; Z+1
JMP @F ; Z is not overflow.
INCMS Y ; Z overflow (FFH Æ00), ÆY=Y+1
NOP ;
;
@@: MOVC ; To lookup data, R = 51H, ACC = 05H.
… ;
TABLE1: DW 0035H ; To define a word (16 bits) data.
DW 5105H
DW 2012H
…
Note: The Y register will not increase automatically when Z register crosses boundary from 0xFF to
0x00. Therefore, user must take care such situation to avoid loop-up table errors. If Z register
overflows, Y register must be added one. The following INC_YZ macro shows a simple method
to process Y and Z registers automatically.
¾Example: INC_YZ macro.
INC_YZ MACRO
INCMS Z ; Z+1
JMP @F ; Not overflow
INCMS Y ; Y+1
NOP ; Not overflow
@@:
ENDM

SN8P2200 Series
USB 1.1 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 20 Version1.7
¾Example: Modify above example by “INC_YZ” macro.
B0MOV Y, #TABLE1$M ; To set lookup table1’s middle address
B0MOV Z, #TABLE1$L ; To set lookup table1’s low address.
MOVC ; To lookup data, R = 00H, ACC = 35H
INC_YZ ; Increment the index address for next address.
;
@@: MOVC ; To lookup data, R = 51H, ACC = 05H.
… ;
TABLE1: DW 0035H ; To define a word (16 bits) data.
DW 5105H
DW 2012H
…
The other example of loop-up table is to add Y or Z index register by accumulator. Please be careful if “carry” happen.
¾Example: Increase Y and Z register by B0ADD/ADD instruction.
B0MOV Y, #TABLE1$M ; To set lookup table’s middle address.
B0MOV Z, #TABLE1$L ; To set lookup table’s low address.
B0MOV A, BUF ; Z = Z + BUF.
B0ADD Z, A
B0BTS1 FC ; Check the carry flag.
JMP GETDATA ; FC = 0
INCMS Y ; FC = 1. Y+1.
NOP
GETDATA: ;
MOVC ; To lookup data. If BUF = 0, data is 0x0035
; If BUF = 1, data is 0x5105
; If BUF = 2, data is 0x2012
…
TABLE1: DW 0035H ; To define a word (16 bits) data.
DW 5105H
DW 2012H
…