ADLINK Technology Com Express nanoX-BT User manual

nanoX-BT
User’s Manual
Manual Revision: 1.03
Revision Date: March 17, 2016
Part Number: 50-1J053-1030

Page 2 nanoX-BT
Revision History
Revision Description Date By
1.00 Initial release 2014-07-24 JC
1.01 Add BIOS Checkpoints, Beep Codes; correct SD signal support; add SEMA CPU temperature
limitation
2014-09-24 JC
1.02 Correct specifications (CPU, memory, serial port, GPIO, eMMC, OS); add SW1 BIOS settings
description
2015-09-07 JC
1.03 Add clarification of single channel 24-bit EDID LVDS panel support by BOM option; correct B99
DDI0 signal name in 3.3 AB Signal Description; update BIOS
2016-03-17 JC

nanoX-BT Page 3
Preface
Copyright 2014-16 ADLINK Technology, Inc.
This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by
any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not
represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or
consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such
damages.
Environmental Responsibility
ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's
Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental
protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and
raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to
dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.
Trademarks
Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their
respective companies.

Page 4 nanoX-BT
Table of Contents
Revision History ............................................................................................................ 2
Preface............................................................................................................................ 3
1. Introduction......................................................................................................... 8
2. Specifications....................................................................................................... 9
2.1. Core System..............................................................................................................................9
2.2. Expansion Busses......................................................................................................................9
2.3. SEMA Board Controller.............................................................................................................9
2.4. Debug Headers .........................................................................................................................9
2.5. Video...................................................................................................................................... 10
2.6. Audio...................................................................................................................................... 10
2.7. LAN ........................................................................................................................................ 10
2.8. Multi I/O and Storage ............................................................................................................ 10
2.9. Power Specifications ............................................................................................................. 11
2.10. Operating Temperatures ....................................................................................................... 11
2.11. Environmental ....................................................................................................................... 11
2.12. Specification Compliance ...................................................................................................... 11
2.13. Operating Systems................................................................................................................. 11
2.14. Functional Diagram................................................................................................................ 12
2.15. Mechanical Dimensions......................................................................................................... 13
3. Pinouts and Signal Descriptions...................................................................... 14
3.1. AB Pin Definitions .................................................................................................................. 14
3.2. Signal Description Terminology............................................................................................. 17
3.3. AB Signal Description............................................................................................................. 18
3.3.1. Audio Signals ...............................................................................................................................18
3.3.2. LVDS/eDP ....................................................................................................................................18
3.3.3. DDI0 Channel...............................................................................................................................19
3.3.4. Gigabit Ethernet ..........................................................................................................................19
3.3.5. SATA ............................................................................................................................................20
3.3.6. PCI Express ..................................................................................................................................20
3.3.7. Express Card................................................................................................................................20
3.3.8. LPC Bus ........................................................................................................................................21
3.3.9. USB 1.1/2.0..................................................................................................................................21
3.3.10. USB 3.0 Extension .......................................................................................................................22
3.3.11. USB Root Segmentation ..............................................................................................................22

nanoX-BT Page 5
3.3.12. SPI (BIOS only) .............................................................................................................................22
3.3.13. Miscellaneous..............................................................................................................................23
3.3.14. SMBus..........................................................................................................................................23
3.3.15. I2C Bus.........................................................................................................................................23
3.3.16. General Purpose I/O (GPIO) ........................................................................................................23
3.3.17. Serial Interface Signals ................................................................................................................24
3.3.18. Power And System Managemen t ................................................................................................24
3.3.19. Power and Ground ......................................................................................................................25
4. Module interfaces ............................................................................................. 26
4.1. Connector, Switch and LED Locations ................................................................................... 26
4.1.1. nanoX-BT and the DB40 Module connected...............................................................................26
4.2. 40-pin Multipurpose Connector ............................................................................................ 27
4.3. Status LEDs ............................................................................................................................ 28
4.4. XDP Debug Header ................................................................................................................29
4.5. nanoX-BT Switch Settings ...................................................................................................... 30
4.5.1. Switch Locations..........................................................................................................................30
4.5.2. SW1: BIOS Select and Mode Configuration Switch .....................................................................30
5. Smart Embedded Management Agent (SEMA) ............................................. 31
5.1. Board Specific SEMA Functions ............................................................................................. 32
5.1.1. Voltages.......................................................................................................................................32
5.1.2. Main Current ...............................................................................................................................32
5.1.3. BMC Status..................................................................................................................................32
5.1.4. Exception Codes ..........................................................................................................................33
5.1.5. BMC Flags....................................................................................................................................33
6. System Resources.............................................................................................. 34
6.1. System Memory Map ............................................................................................................ 34
6.2. I/O Map.................................................................................................................................. 34
6.3. Interrupt Request (IRQ) Lines ................................................................................................ 35
6.3.1. PIC Mode.....................................................................................................................................35
6.3.2. APIC Mode...................................................................................................................................35
6.4. PCI Configuration Space Map ................................................................................................ 37
6.5. PCI Interrupt Routing Map .................................................................................................... 38
6.6. SMBus Address Table ............................................................................................................ 38
7. BIOS Setup ......................................................................................................... 39
7.1. Menu Structure ..................................................................................................................... 39
7.2. Main....................................................................................................................................... 40

Page 6 nanoX-BT
7.2.1. System Information.....................................................................................................................40
7.2.2. Processor Information.................................................................................................................40
7.2.3. VGA Firmware Version ................................................................................................................40
7.2.4. Memory Information...................................................................................................................40
7.2.5. SOC Information..........................................................................................................................40
7.2.6. System Management ..................................................................................................................41
7.2.7. System Date and Time.................................................................................................................43
7.3. Advanced ............................................................................................................................... 44
7.3.1. CPU..............................................................................................................................................44
7.3.2. Memory.......................................................................................................................................45
7.3.3. Graphics ......................................................................................................................................45
7.3.4. SATA ............................................................................................................................................46
7.3.5. USB ..............................................................................................................................................46
7.3.6. Network.......................................................................................................................................47
7.3.7. PCI and PCIe ................................................................................................................................48
7.3.8. Super IO.......................................................................................................................................50
7.3.9. ACPI and Power Management ....................................................................................................50
7.3.10. Sound ..........................................................................................................................................51
7.3.11. Serial Port Console ......................................................................................................................51
7.3.12. Thermal .......................................................................................................................................52
7.3.13. Miscellaneous..............................................................................................................................53
7.4. Boot ....................................................................................................................................... 54
7.4.1. Boot Configuration......................................................................................................................54
7.5. Security .................................................................................................................................. 55
7.5.1. Password Description..................................................................................................................55
7.6. Save & Exit ............................................................................................................................. 56
8. BIOS Checkpoints, Beep Codes........................................................................ 57
8.1. Checkpoint Ranges ................................................................................................................ 58
8.2. Standard Checkpoints............................................................................................................58
8.2.1. SEC Phase ....................................................................................................................................58
8.2.2. SEC Beep Codes...........................................................................................................................59
8.2.3. PEI Phase .....................................................................................................................................59
8.2.4. PEI Beep Codes............................................................................................................................61
8.2.5. DXE Phase....................................................................................................................................61
8.2.6. DXE Beep Codes ..........................................................................................................................64
8.2.7. ACPI/ASL Checkpoint...................................................................................................................64
8.3. OEM-Reserved Checkpoint Ranges ....................................................................................... 65
9. Mechanical Information ................................................................................... 66

nanoX-BT Page 7
9.1. Board-to-Board Connectors .................................................................................................. 66
9.2. Thermal Solution ................................................................................................................... 67
9.2.1. Heat Spreaders............................................................................................................................67
9.2.2. Heat Sinks....................................................................................................................................67
9.2.3. Installation...................................................................................................................................67
9.3. Mounting Methods................................................................................................................69
9.4. Standoff Types ....................................................................................................................... 70
Safety Instructions ...................................................................................................... 71
Getting Service ............................................................................................................ 72

Page 8 nanoX-BT
1. Introduction
The nanoX-BT is a COM Express® COM.0 R2.1 Type 10 module supporting Intel® Atom™ processor E3800 Series and Intel® Celeron®
processor system-on-chip (SoC). The nanoX-BT is specifically designed for customers who need high-level processing and graphics
performance with low power consumption in a long product life solution.
The nanoX-BT features Intel® Atom™ processor E3800 and Intel® Celeron® processor supporting non-ECC type DDR3L single-channel
memory at 1066/1333 MHz to provide excellent overall performance. Integrated Intel® Gen7 HD Graphics includes features such as
OpenGL 3.1, DirectX 11, OpenCL 1.1 and support for H.264, MPEG2, VC1, VP8 hardware decode. Graphics outputs include DDI ports
supporting HDMI/DVI/DisplayPort and single-channel 18/24-bit LVDS (eDP is optional). The nanoX-BT is specifically designed for customers
with high-performance processing graphics requirements who want to outsource the custom core logic of their systems for reduced
development time.
The nanoX-BT has soldered type non-ECC DDR3L memory up to 4GB. In addition, onboard eMMC memory (8GB/16GB/32GB) and SD
signals are optionally supported.
The nanoX-BT features a single onboard Gigabit Ethernet port, USB 3.0 ports and USB 2.0 ports, and SATA 3 Gb/s ports. Support is
provided for SMBus and I2C. The module is equipped with SPI AMI EFI BIOS, supporting embedded features such as remote console,
CMOS backup, hardware monitor, and watchdog timer.

nanoX-BT Page 9
2. Specifications
2.1. Core System
¾CPU: Single, dual or quad-core Intel® Atom™ or Celeron® Processor
•Atom™ E3845 1.91 GHz 542/792 (Turbo) 10W (4C/1333)
•Atom™ E3827 1.75 GHz 542/792 (Turbo) 8W (2C/1333)
•Atom™ E3826 1.46 GHz 533/667 (Turbo) 7W (2C/1066)
•Atom™ E3825 1.33 GHz 533 (No Turbo) 6W (2C/1066)
•Atom™ E3815 1.46 GHz 400 (No Turbo) 5W (1C/1066)
•Atom™ E3805 1.33 GHz (No Graphics) 3W (2C/1066)
•Celeron® N2930 1.83/2.16 (Burst) GHz, 313/854 (Turbo) 7.5W (4C/1333)
•Celeron® J1900 2.0/2.42 (Burst) GHz, 688/854 (Turbo) 10W (4C/1333)
Supports: Single, dual or quad Out-of-Order Execution (OOE) processor cores, Intel® VT-x, Intel® SSE4.1 and SSE4.2, Intel® 64 architecture,
IA 32-bit, PCLMULQDQ Instruction, DRNG, Intel® Thermal Monitor (TM1 & TM2)
Note: Availability of features may vary between processor SKUs.
¾Cache: Primary 32 kB, 8-way L1 instruction cache and 24 kB, 6-way L1 write-back data cache
•2MB L2 Cache: E3845, N2930 and J1900
•1MB L2 Cache: E3827, E3826, E3825 and E3805
•512k L2 Cache: E3815
¾Memory: Single channel non-ECC 1333/1066 MHz soldered DDR3L memory up to 4GB
Note: Availability of features may vary between processor SKUs.
¾Embedded BIOS: AMI EFI with CMOS backup in 8MB SPI BIOS
2.2. Expansion Busses
¾3 PCI Express x1 GEN2 (AB): lanes 0/1/2 (build option: PCIe x4, lose GbE)
¾LPC bus, SMBus (system) , I2C (user)
2.3. SEMA Board Controller
¾Type: ADLINK Smart Embedded Management Agent (SEMA)
¾Supports:
•Voltage/Current monitoring
•Power sequence debug support
•AT/ATX mode control
•Logistics and Forensic information
•Flat Panel Control
•General Purpose I2C
•Failsafe BIOS (dual BIOS )
•Watchdog Timer and Fan Control
2.4. Debug Headers
¾40-pin multipurpose flat cable connector, used in combination with DB-40 debug module providing BIOS POST code LED, BMC
access, SPI BIOS flashing, Power Testpoints, Debug LEDs
¾Optional 60-pin XDP header for ICE debug of SOC on breakount PCB extension

Page 10 nanoX-BT
2.5. Video
¾GPU Feature Support: 7th generation graphics Intel core architecture with four execution units supporting two independent displays
•3D graphics hardware acceleration
•Support for DirectX11, OCL 1.1, OGL ES Halt/2.0/1.1, OGL 3.2
•Video decode hardware acceleration including support for H.264, MPEG2, VC-1, WMV and VP8 formats
•Video encode hardware acceleration including support for H.264, MPEG2 and MVC formatsPlayback of Blu-ray disc S3D content using HDMI
(1.4a spec compliant with 3D)
Note: Availability of features may vary between operating systems
¾Display Interface support
•LVDS: Single channel 18/24-bit LVDS from eDP (one lane)
Default: 18-bit EDID LVDS and 18/24-bit non-EDID LVDS (see 7.3.3. Graphics for supported resolutions)
Optional: 24-bit EDID LVDS
•eDP: Support by BOM option (in place of LVDS)
•DDI0: Supports DisplayPort, HDMI, DVI, eDP
2.6. Audio
¾Integrated: Intel® HD Audio integrated in SOC
¾Audio Codec: located on evaluation carrier miniBase-10R (ALC262 standard supported)
2.7. LAN
¾Type: Intel® i210LM (MAC/PHY) Ethernet controller
¾Interface: 10/100/1000 GbE connection
2.8. Multi I/O and Storage
¾Integrated in SOC
¾USB:
•1x USB. 1.1/2.0/3.0 (USB 0)
•3x USB. 1.1/2.0 (USB 1,2,3)
•1x USB. 1.1/2.0 Client (USB 7)
¾SATA: 2x ports SATA 3Gb/s (SATA0, SATA1)
¾eMMC: optional soldered on module bootable eMMC flash storage (8GB/16GB/32GB,support dependent on OS)
¾Serial: 2x UART ports COM 1/2 (COM 1 supports console redirection)
¾SD: optional SD signal support mulitplexed over GPIO pins, support dependent on OS
¾GPIO: 4x GPO and 4x GPI
For 24-bit EDID LVDS panel
(BOM option)
For 18-bit EDID LVDS panel (default)

nanoX-BT Page 11
2.9. Power Specifications
¾Power Modes: AT and ATX mode (AT mode start controlled by SEMA)
¾Standard Voltage Input: ATX = 12V±5%, 5Vsb ±5% or AT = 12V ±5%
¾Wide Voltage Input: ATX = 5~14 V, 5Vsb ±5% or AT = 5 ~14V
¾Power Management: ACPI 4.0 compliant, Smart Battery support
¾Power States: supports C1-C6, S0, S1, S4, S3, S5, S5 ECO mode (Wake on USB S3/S4, WOL S3/S4/S5)
¾ECO mode: supports deep S5 for 5Vsb power saving
2.10. Operating Temperatures
¾Standard Operating Temperature: 0°C to 60°C (wide voltage input)
¾Extreme Rugged Operating Temperature (optional)*: -40°C to 85°C (standard voltage input)
*Intel® Atom™ E3800 Series processors only
2.11. Environmental
¾Humidity: 5-90% RH operating, non-condensing
5-95% RH storage (and operating with conformal coating).
¾Shock and Vibration: IEC 60068-2-64 and IEC-60068-2-27
MIL-STD-202F, Method 213B, Table 213-I, Condition A and Method 214A, Table 214-I, Condition D
¾Halt: Thermal Stress, Vibration Stress, Thermal Shock and Combined Test
2.12. Specification Compliance
¾PICMG COM.0: Rev 2.1 Type 10, mini size 84 x 55
2.13. Operating Systems
¾Standard Support: Windows 7/8 32/64-bit, Linux 32/64-bit
¾Extended Support (BSP): WES7/8, WEC7 32-bit, Linux, VxWorks 32/64-bit

Page 12 nanoX-BT
2.14. Functional Diagram
On break-out board
AB
GbE
i210
Intel® Atom™
E3845
E3827
E3826
E3825
E3815
E3805 (No GFX)
Intel® Celeron®
N2930
J1900
(formerly “Baytrail”)
Soldered
2~4 GB DDR3L
non ECC (only)
DDI2
4 lanes
3 PCIe x1 Gen2
(port 0~2)
HD Audio
2x SATA 3Gb/s
(port 0/1)
1x USB 1.1/2.0/3.0 (port 0)
3x USB 1.1/2.0 (port 1~3)
1x USB 1.1/2.0 client (port 7)
XDP
60-pin
PCIe x1 Gen2
(port 3)
eMMC
8GB/16GB/
32GB
LM73
to CPU
GPIO
PCA9535
SEMA
BMC
SMBus
4x GP0, 4x GPI
GP I2C
LPC Bus
SPI
SPI0
BIOS
DDC I2C
SPI_CS#
LVDS
eDP to LVDS
RTL2132
DDI1
eDP 1 lane
2 UART (Tx/Rx)
eDP (optional)
SD/MMC port 0 (optional)
PCIe x1
alternative
route

nanoX-BT Page 13
2.15. Mechanical Dimensions
Top View
Side View
connector on boom side
Units: mm

Page 14 nanoX-BT
3. Pinouts and Signal Descriptions
3.1. AB Pin Definitions
The nanoX-BT is a Type 10 module supporting USB3.0 and DDI channel on the AB connector
In below table all standard pins of the COM Express specification are described, also those not supported on the nanoX-BT !
Note: Signals not supported on the nanoX-BT module are crossed out
Type 10 COM.0 Rev. 2.1
Row A Row B
Pin Name Pin Name
1 GND(FIXED) 1 GND(FIXED)
2 GBE0_MDI3- 2 GBE0_ACT#
3 GBE0_MDI3+ 3 LPC_FRAME#
4 GBE0_LINK100# 4 LPC_AD0
5 GBE0_LINK1000# 5 LPC_AD1
6 GBE0_MDI2- 6 LPC_AD2
7 GBE0_MDI2+ 7 LPC_AD3
8 GBE0_LINK# 8 LPC_DRQ0#
9 GBE0_MDI1- 9 LPC_DRQ1#
10 GBE0_MDI1+ 10 LPC_CLK
11 GND(FIXED) 11 GND(FIXED)
12 GBE0_MDI0- 12 PWRBTN#
13 GBE0_MDI0+ 13 SMB_CK
14 GBE0_CTREF 14 SMB_DAT
15 SUS_S3# 15 SMB_ALERT#
16 SATA0_TX+ 16 SATA1_TX+
17 SATA0_TX- 17 SATA1_TX-
18 SUS_S4# 18 SUS_STAT#
19 SATA0_RX+ 19 SATA1_RX+
20 SATA0_RX- 20 SATA1_RX-
21 GND(FIXED) 21 GND(FIXED)
22 USB_SSRX0- 22 USB_SSTX0-
23 USB_SSRX0+ 23 USB_SSTX0+
24 SUS_S5# 24 PWR_OK
25 USB_SSRX1-25 USB_SSTX1-
26 USB_SSRX1+ 26 USB_SSTX1+
27 BATLOW# 27 WDT
28 (S)ATA_ACT# 28 AC/HDA_SDIN2
29 AC/HDA_SYNC 29 AC/HDA_SDIN1
30 AC/HDA_RST# 30 AC/HDA_SDIN0
31 GND(FIXED) 31 GND(FIXED)
32 AC/HDA_BITCLK 32 SPKR
33 AC/HDA_SDOUT 33 I2C_CK
34 BIOS_DIS0# 34 I2C_DAT

nanoX-BT Page 15
Row A Row B
Pin Name Pin Name
35 THRMTRIP# 35 THRM#
36 USB6-36 USB7-
37 USB6+37 USB7+
38 USB_6_7_OC# 38 USB_4_5_OC#
39 USB4-39 USB5-
40 USB4+ 40 USB5+
41 GND(FIXED) 41 GND(FIXED)
42 USB2- 42 USB3-
43 USB2+ 43 USB3+
44 USB_2_3_OC# 44 USB_0_1_OC#
45 USB0- 45 USB1-
46 USB0+ 46 USB1+
47 VCC_RTC 47 EXCD1_PERST#
48 EXCD0_PERST# 48 EXCD1_CPPE#
49 EXCD0_CPPE# 49 SYS_RESET#
50 LPC_SERIRQ 50 CB_RESET#
51 GND(FIXED) 51 GND(FIXED)
52 RSVD 52 RSVD
53 RSVD 53 RSVD
54 GPI0 54 GPO1
55 RSVD 55 RSVD
56 RSVD 56 RSVD
57 GND 57 GPO2
58 PCIE_TX3+ * 58 PCIE_RX3+ *
59 PCIE_TX3-* 59 PCIE_RX3-*
60 GND(FIXED) 60 GND(FIXED)
61 PCIE_TX2+ 61 PCIE_RX2+
62 PCIE_TX2- 62 PCIE_RX2-
63 GPI1 63 GPO3
64 PCIE_TX1+ 64 PCIE_RX1+
65 PCIE_TX1- 65 PCIE_RX1-
66 GND 66 WAKE0#
67 GPI2 67 WAKE1#
68 PCIE_TX0+ 68 PCIE_RX0+
69 PCIE_TX0- 69 PCIE_RX0-
70 GND(FIXED) 70 GND(FIXED)
71 LVDS_A0+ / eDP_TX2+ 71 DDI0_PAIR0+
72 LVDS_A0- / eDP_TX2- 72 DDI0_PAIR0-
73 LVDS_A1+ / eDP_TX1+ 73 DDI0_PAIR1+
74 LVDS_A1- / eDP_TX1- 74 DDI0_PAIR1-
75 LVDS_A2+ / eDP_TX0+ 75 DDI0_PAIR2+
76 LVDS_A2- / eDP_TX0- 76 DDI0_PAIR2-
77 LVDS_/eDP_VDD_EN 77 DDI0_PAIR4+
78 LVDS_A3+ 78 DDI0_PAIR4-
79 LVDS_A3- 79 LVDS_/eDP_BKLT_EN

Page 16 nanoX-BT
Row A Row B
Pin Name Pin Name
80 GND(FIXED) 80 GND(FIXED)
81 LVDS_A_CK+ / eDP_TX3+ 81 DDI0_PAIR3+
82 LVDS_A_CK- / eDP_TX3- 82 DDI0_PAIR3-
83 LVDS_I2C_CK / eDP_AUX+ 83 LVDS_/eDP_BKLT_CTRL
84 LVDS_I2C_DAT / eDP_AUX- 84 VCC_5V_SBY
85 GPI3 85 VCC_5V_SBY
86 RSVD 86 VCC_5V_SBY
87 eDP_HPD 87 VCC_5V_SBY
88 PCIE_CLK_REF+ 88 BIOS_DIS1#
89 PCIE_CLK_REF- 89 DD0_HPD
90 GND(FIXED) 90 GND(FIXED)
91 SPI_POWER 91 DDI0_PAIR5+
92 SPI_MISO 92 DDI0_PAIR5-
93 GPO0 93 DDI0_PAIR6+
94 SPI_CLK 94 DDI0_PAIR6-
95 SPI_MOSI 95 DDI0_DDC_AUX_SEL
96 TPM_PP 96 USB_HOST_PRSNT
97 TYPE10# 97 SPI_CS#
98 SER0_TX 98 DDI0_CTRLCLK_AUX+
99 SER0_RX 99 DDI0_CTRLDATA_AUX-
100 GND(FIXED) 100 GND(FIXED)
101 SER1_TX / CAN_TX 101 FAN_PWMOUT
102 SER1_RX / CAN_RX 102 FAN_TACHIN
103 LID# 103 SLEEP#
104 VCC_12V 104 VCC_12V
105 VCC_12V 105 VCC_12V
106 VCC_12V 106 VCC_12V
107 VCC_12V 107 VCC_12V
108 VCC_12V 108 VCC_12V
109 VCC_12V 109 VCC_12V
110 GND(FIXED) 110 GND(FIXED)
Notes:
-LID# and SLEEP# signals are not natively supported on the SOC, they instead connect to GPIO pins simulating their behaviour.
-eDP can be supported by BOM option with loss of LVDS.
-PCIe (port 3) can be supported by BOM option (lose GbE)

nanoX-BT Page 17
3.2. Signal Description Terminology
The following terms are used in the COM Express AB/CD Signal Descriptions below.
I Input to the Module
O Output from the Module
I/O Bi-directional input / output signal
OD Open drain output
I 3.3V Input 3.3V tolerant
I 5V Input 5V tolerant
O 3.3V Output 3.3V signal level
O 5V Output 5V signal level
I/O 3.3V Bi-directional signal 3.3V tolerant
I/O 5V Bi-directional signal 5V tolerant
I/O 3.3Vsb Input 3.3V tolerant active in standby state
P Power Input/Output
REF Reference voltage output that may be sourced from a module power plane.
PDS Pull-down strap. This is an output pin on the module that is either tied to GND or not connected.
The signal is used to indicate the PICMG module type to the Carrier Board.
PU ADLINK implemented pull-up resistor on module
PD ADLINK implemented pull-down resistor on module

Page 18 nanoX-BT
3.3. AB Signal Description
3.3.1. Audio Signals
Signal Pin # Description I/O PU/PD Comment
AC_RST# /
HDA_RST#
A30 Reset output to CODEC, active low. O 3.3VSB
AC_SYNC /
HDA_SYNC
A29 Sample-synchronization signal to the CODEC(s). O 3.3V
AC_BITCLK /
HDA_BITCLK
A32 Serial data clock generated by the external CODEC(s). I/O 3.3V
AC _SDOUT /
HDA_SDOUT
A33 Serial TDM data output to the CODEC. O 3.3V
AC _SDIN[2:0]
HDA_SDIN[2:0]
B28- B30 Serial TDM data inputs from up to 3 CODECs. I/O 3.3VSB AC_SDIN0: supported
AC_SDIN1: supported
AC_SDIN2: not supported
3.3.2. LVDS/eDP
Signal Pin # Description I/O PU/PD Comment
LVDS_A0+ / eDP_TX2+
LVDS_A0- / eDP_TX2-
LVDS_A1+ / eDP_TX1+
LVDS_A1- / eDP_TX1-
LVDS_A2+ / eDP_TX0+
LVDS_A2- / eDP_TX0+
LVDS_A3+
LVDS_A3-
A71
A72
A73
A74
A75
A76
A78
A79
LVDS Channel A differential
pairs
O LVDS
LVDS_A_CK+ / eDP_TX3+
LVDS_A_CK- / eDP_TX3-
A81
A82
LVDS Channel A differential
clock
O LVDS
LVDS_VDD_EN / eDP_VDD_EN A77 LVDS panel power enable O 3.3V
LVDS_BKLT_EN / eDP_BKLT_EN B79 LVDS panel backlight enable O 3.3V
eDP
by build option
LVDS_BKLT_CTRL / eDP_BKLT_CTRL B83 LVDS panel backlight brightness
control
O 3.3V PD 100k Realtek eDP to
LVDS
requirement
LVDS_I2C_CK / eDP_AUX+ A83 DDC lines used for flat panel
detection and control.
O 3.3V PU 2k2
3.3V
LVDS_I2C_DAT / eDP_AUX- A84 DDC lines used for flat panel
detection and control.
I/O 3.3V PU 2k2
3.3V
RSVD / eDP_HPD A87 Digital Display Interface Hot-Plug
Detect
I 3.3V

nanoX-BT Page 19
3.3.3. DDI0 Channel
Signal Pin # Description I/O PU/PD Comment
DDI0_PAIR0+
DDI0_PAIR0-
DDI0_PAIR1+
DDI0_PAIR1-
DDI0_PAIR2+
DDI0_PAIR2-
DDI0_PAIR3+
DDI0_PAIR3-
DDI0_PAIR4+
DDI0_PAIR4-
DDI0_PAIR5+
DDI0_PAIR5-
DDI0_PAIR6+
DDI0_PAIR6-
B71
B72
B73
B74
B75
B76
B81
B82
B77
B78
B91
B92
B93
B94
Digital Display Interface differential pairs O PCIE Pair 4 to Pair 6
are not
supported
DDI0_HPD B89 Digital Display Interface Hot-Plug Detect I 3.3V PD
100k
IF DDI0_DDC_AUX_SEL is floating I/O PCIe DP AUX+DDI0_CTRLCLK_AUX+ B98
IF DDI0_DDC_AUX_SEL pulled high I/O OD 3.3V HMDI0_CTRLC
LK
IF DDI0_DDC_AUX_SEL is floating I/O PCIe DP AUX+DDI0_CTRLDATA_AUX- B99
IF DDI0_DDC_AUX_SEL pulled high I/O OD 3.3V HMDI0_
CTRLDAT
DDI0_DDC_AUX_SEL B95 Selects the function of DDI1_CTRLCLK_AUX+ and
DDI1_CTRLDATA_AUX-. This pin shall have a 1M pull-down
to logic ground on the Module. If this input is floating the AUX
pair is used for the DP AUX+/- signals. If pulled-high the AUX
pair contains the CRTLCLK and CTRLDATA signals.
I/O OD 3.3V PD 1M
3.3.4. Gigabit Ethernet
Gigabit Ethernet Pin # Description I/O PU/PD Comment
GBE0_MDI0+
GBE0_MDI0-
GBE0_MDI1+
GBE0_MDI1-
GBE0_MDI2+
GBE0_MDI2-
GBE0_MDI3+
GBE0_MDI3-
A13
A11
A10
A9
A7
A6
A3
A2
Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs
0, 1, 2, 3. The MDI can operate in 1000, 100, and 10Mbit/sec modes.
Some pairs are unused in some modes according to the following:
1000 100 10
MDI[0]+/- B1_DA+/- TX+/- TX+/-
MDI[1]+/- B1_DB+/- RX+/- RX+/-
MDI[2]+/- B1_DC+/-
MDI[3]+/- B1_DD+/-
I/O
Analog
Twisted pair
signals for
external
transformer.
GBE0_ACT# B2 Gigabit Ethernet Controller 0 activity indicator, active low. OD
3.3VSB
PD 10k
3.3VSB
GBE0_LINK# A8 Gigabit Ethernet Controller 0 link indicator, active low. OD
3.3VSB
GBE0_LINK100# A4 Gigabit Ethernet Controller 0 100Mbit/sec link indicator, active low. OD
3.3VSB
GBE0_LINK1000# A5 Gigabit Ethernet Controller 0 1000Mbit/sec link indicator, active low. OD
3.3VSB
GBE0_CTREF A14 Reference voltage for Carrier Board Ethernet channel 1 and 2 magnetics
center tap. The reference voltage is determined by the requirements of the
Module PHY and may be as low as 0V and as high as 3.3V. The reference
voltage output shall be current limited on the Module. In the case in which
the reference is shorted to ground, the current shall be 250 mA or less.
GND min
3.3V
max

Page 20 nanoX-BT
3.3.5. SATA
Signal Pin # Description I/O PU/PD Comment
SATA0_TX+
SATA0_TX-
A16
A17
Serial ATA channel 0, Transmit Output differential pair. O SATA AC coupled on Module
SATA0_RX+
SATA0_RX-
A19
A20
Serial ATA channel 0, Receive Input differential pair. I SATA AC coupled on Module
SATA1_TX+
SATA1_TX-
B16
B17
Serial ATA channel 1, Transmit Output differential pair. O SATA AC coupled on Module
SATA1_RX+
SATA1_RX-
B19
B20
Serial ATA channel 1, Receive Input differential pair. I SATA AC coupled on Module
(S)ATA_ACT# A28 ATA (parallel and serial) or SAS activity indicator, active low. O 3.3V
3.3.6. PCI Express
Signal Pin # Description I/O PU/PD Comment
PCIE_TX0+ PCIE_TX0- A68
A69
PCI Express channel 0, Transmit
Output differential pair.
O PCIE AC coupled on module
PCIE_RX0+ PCIE_RX0- B68
B69
PCI Express channel 0, Receive Input
differential pair.
I PCIE AC coupled off module
PCIE_TX1+ PCIE_TX1- A64
A65
PCI Express channel 1, Transmit
Output differential pair.
O PCIE AC coupled on module
PCIE_RX1+ PCIE_RX1- B64
B65
PCI Express channel 1, Receive Input
differential pair.
I PCIE AC coupled off module
PCIE_TX2+ PCIE_TX2- A61
A62
PCI Express channel 2, Transmit
Output differential pair.
O PCIE AC coupled on module
PCIE_RX2+ PCIE_RX2- B61
B62
PCI Express channel 2, Receive Input
differential pair.
I PCIE AC coupled off module
PCIE_TX3+ PCIE_TX3- A58
A59
PCI Express channel 3, Transmit
Output differential pair.
O PCIE used by GbE
PCIE_RX3+ PCIE_RX3- B58
B59
PCI Express channel 3, Receive Input
differential pair.
I PCIE used by GbE
PCIE_CLK_REF+ PCIE_CLK_REF- A88
A89
PCI Express Reference Clock output
for all PCI Express and PCI Express
Graphics Lanes.
O PCIE
3.3.7. Express Card
Signal Pin # Description I/O PU/PD Comment
EXCD0_CPPE# EXCD1_CPPE# A49
B48
PCI ExpressCard: PCI Express
capable card request
I 3.3V PU 10k 3.3V
EXCD0_PERST# EXCD1_PERST# A48
B47
PCI ExpressCard: reset O 3.3V