GOWIN DK-GoAI-GW2A55PBGA484 User manual

DK-GoAI-GW2A55PBGA484_V1.0
User Guide
DBUG378-1.0E, 08/19/2020

Copyright©2020 Guangdong Gowin Semiconductor Corporation. All Rights Reserved.
No part of this document may be reproduced or transmitted in any form or by any denotes,
electronic, mechanical, photocopying, recording or otherwise, without the prior written
consent of GOWINSEMI.
Disclaimer
GOWINSEMI®, LittleBee®, Arora, and the GOWINSEMI logos are trademarks of
GOWINSEMI and are registered in China, the U.S. Patent and Trademark Office, and other
countries. All other words and logos identified as trademarks or service marks are the
property of their respective holders, as described at www.gowinsemi.com. GOWINSEMI
assumes no liability and provides no warranty (either expressed or implied) and is not
responsible for any damage incurred to your hardware, software, data, or property resulting
from usage of the materials or intellectual property except as outlined in the GOWINSEMI
Terms and Conditions of Sale. All information in this document should be treated as
preliminary. GOWINSEMI may make changes to this document at any time without prior
notice. Anyone relying on this documentation should contact GOWINSEMI for the current
documentation and errata.

Revision History
Date Version Description
08/19/2020 1.0E Initial version published.

Contents
DBUG378-1.0E
i
Contents
Contents ............................................................................................................... i
List of Figures.................................................................................................... iii
List of Tables...................................................................................................... iv
1About This Guide .......................................................................................... 1
1.1 Purpose..........................................................................................................................1
1.2 Supported Products ........................................................................................................1
1.3 Related Documents ........................................................................................................1
1.4 Terminology and Abbreviations........................................................................................2
1.5 Support and Feedback....................................................................................................3
2Introduction ................................................................................................... 4
2.1 Overview ........................................................................................................................4
2.2 Development Kit .............................................................................................................5
2.3 PCB Components...........................................................................................................6
2.4 System Block Diagram....................................................................................................7
2.5 Features .........................................................................................................................8
2.6 Development Board Description......................................................................................9
3Development Board Circuit ........................................................................ 11
3.1 FPGA Module ...............................................................................................................11
3.2 Download .....................................................................................................................11
3.2.1 Overview ...................................................................................................................11
3.2.2 USB Download Circuit................................................................................................12
3.2.3 Download Flow ..........................................................................................................12
3.2.4 Pinout ........................................................................................................................12
3.3 Power Supply ...............................................................................................................13
3.3.1 Overview ...................................................................................................................13
3.3.2 Power System Distribution .........................................................................................14
3.3.3 FPGA Power Pinout ...................................................................................................15

Contents
DBUG378-1.0E
ii
3.4 Clock, Reset .................................................................................................................15
3.4.1 Overview ...................................................................................................................15
3.4.2 Clock, Reset Circuit ...................................................................................................16
3.4.3 Pinout ........................................................................................................................16
3.5 LED ..............................................................................................................................16
3.5.1 Overview ...................................................................................................................16
3.5.2 LED Circuit ................................................................................................................17
3.5.3 Pinout ........................................................................................................................17
3.6 GPIO ............................................................................................................................18
3.6.1 Overview ...................................................................................................................18
3.6.2 Pinout ........................................................................................................................18
3.7 FPC Connector.............................................................................................................18
3.7.1 Overview ...................................................................................................................18
3.7.2 FPC Circuit ................................................................................................................19
3.7.3 Pinout ........................................................................................................................20
3.8 HDMI............................................................................................................................21
3.8.1 Overview ...................................................................................................................21
3.8.2 HDMI Circuit ..............................................................................................................21
3.8.3 Pinout ........................................................................................................................22
3.9 Microphone Circuit........................................................................................................23
3.9.1 Pinout ........................................................................................................................23
4Notes ............................................................................................................ 24
5Gowin Software ........................................................................................... 25

List of Figures
DBUG378-1.0E
iii
List of Figures
Figure 2-1 DK-GoAI-GW2A55PBGA484_V1.0 Development Board..................................................4
Figure 2-2 A Development Kit...........................................................................................................5
Figure 2-3 PCB Components ...........................................................................................................6
Figure 2-4 System Block Diagram....................................................................................................7
Figure 3-1 FPGA USB Download Diagram .......................................................................................12
Figure 3-2 Power System Distribution ..............................................................................................14
Figure 3-3 Clock, Reset ...................................................................................................................16
Figure 3-4 LED Circuit .....................................................................................................................17
Figure 3-5 FPC Circuit .....................................................................................................................19
Figure 3-6 HDMI Connection Diagram .............................................................................................21
Figure 3-7 Microphone Circuit ..........................................................................................................23

List of Tables
DBUG378-1.0E
iv
List of Tables
Table 1-1 Terminology and Abbreviations .........................................................................................2
Table 2-1 Development Board Description .......................................................................................9
Table 3-1 FPGA Download Pinout ....................................................................................................12
Table 3-2 FPGA Power Pinout..........................................................................................................15
Table 3-3 FPGA Clock and Reset Pinout..........................................................................................16
Table 3-4 LED Pinout.......................................................................................................................17
Table 3-5 GPIO Pinout .....................................................................................................................18
Table 3-6 FPC Pinout.......................................................................................................................20
Table 3-7 HDMI_TX Pinout ..............................................................................................................22
Table 3-8 HDMI_RX Pinout ..............................................................................................................22
Table 3-9 Microphone Pinout............................................................................................................23

1 About This Guide
1.1 Purpose
DBUG378-1.0E
1(25)
1About This Guide
1.1 Purpose
DK-GoAI-GW2A55PBGA484_V1.0 User Guide consists of the
following four parts:
1. A brief introduction to the features and hardware resources of the
development board;
2. An introduction to the function, circuit, and pinout of each module;
3. Notes for the use of the development board;
4. An introduction to the usage of the FPGA development software.
1.2 Supported Products
The information in the guide applies to GW2A series of FPGA products:
GW2A-55.
1.3 Related Documents
You can find the related documents at www.gowinsemi.com:
1. DS102, GW2A series of FPGA Products Data Sheet
2. UG111, GW2A series of FPGAProducts Package and Pinout Manual
3. UG113, GW2A-55 Pinout
4. UG290, Gowin FPGAProducts Programming and Configuration
Manual
5. SUG100, Gowin Software User Guide

1 About This Guide
1.4 Terminology and Abbreviations
DBUG378-1.0E
2(25)
1.4 Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown
in Table 1-1.
Table 1-1 Terminology and Abbreviations
Terminology and Abbreviations Meaning
FPGA Field Programmable Gate Array
SIP System in Package
SDRAM Synchronous Dynamic RAM
CFU Configurable Function Unit
CLS Configurable Logic Slice
CRU Configurable Routing Unit
LUT4 Four-input Look-up Tables
LUT5 Five-input Look-up Tables
LUT6 Six-input Look-up Tables
LUT7 Seven-input Look-up Tables
LUT8 Eight-input Look-up Tables
REG Register
ALU Arithmetic Logic Unit
IOB Input/Output Block
S-SRAM Shadow Static Random Access Memory
B-SRAM Block Static Random Access Memory
SP Single Port
SDP Semi Dual Port
DP Dual Port
DSP Digital Signal Processing
TDM Time Division Multiplexing
DQCE Dynamic Quadrant Clock Enable
DCS Dynamic Clock Selector
PLL Phase-locked Loop
DLL Delay-locked Loop
PG484 PBGA484

1 About This Guide
1.5 Support and Feedback
DBUG378-1.0E
3(25)
1.5 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly by the following ways.
Website: www.gowinsemi.com
E-mail: [e-mail]

2 Introduction
2.1 Overview
DBUG378-1.0E
4(25)
2Introduction
2.1 Overview
Figure 2-1 DK-GoAI-GW2A55PBGA484_V1.0 Development Board
The board uses GW2A55 FPGA device embedded with B-SRAM, DSP,
PLL and on chip oscillator. The GW2A series of FPGA products are the first
generation of the Arora family. The GW2A series provide high-performance
DSP resources, high-speed LVDS interfaces, and abundant BSRAM
resources. These embedded resources in combination with a streamlined
FPGA architecture with 55nm process make the GW2AR series of FPGA
products suitable for high-speed and low-cost applications.
The development board offers abundant external interfaces including
dual-channel microphone, camera, HDMI. There are also LED, reset, clock
and other resources for developers or learners to use.

2 Introduction
2.2 Development Kit
DBUG378-1.0E
5(25)
2.2 Development Kit
The development board kit includes the following items:
DK-GoAI-GW2A55PBGA484_V1.0 development board
USB Cable
5V Adaptor
Quick Start Guide
Figure 2-2 A Development Kit
1
23
4
① Gowin DK-GoAI-GW2A55PBGA484_V1.0
Development Board
②
5V Power Supply
③
USB Mini-B Download Cable
④
Quick Start User Manual

2 Introduction
2.3 PCB Components
DBUG378-1.0E
6(25)
2.3 PCB Components
Figure 2-3 PCB Components
5V Power Outlet
Power Switch
Flash
HDMI RX
GPIO
LED
Reset Key
HyperRAM
microphone
(right channel)
microphone
(left channel)
3.3V, 1.8V
Power Supply
2.5V, 1.2V
Power Supply
2.8V Power
Supply
1.0V Power
Supply
USB
USB-to-JTAG Chip
FPGA
HDMI TX
Camera

2 Introduction
2.4 System Block Diagram
DBUG378-1.0E
7(25)
2.4 System Block Diagram
Figure 2-4 System Block Diagram
MIPI USB
HDMI TX
camera
64Mbit
HyperRAM
5V
GW2A-LV55PG484
Reset
FT232HL
HDMI
RX
64Mbit
Flash
Microphone
6*
LED
10 GPIO

2 Introduction
2.5 Features
DBUG378-1.0E
8(25)
2.5 Features
The features of the development board are as follows:
FPGA
-PBGA484
-Up to 319 user I/O
-Abundant LUT4 resources
-Multiple modes and capacities of B-SRAM
FPGA Configuration Modes
-MSPI
-JTAG
Clock resource
-27MHz Clock Crystal Oscillator
Key
-One reset key
LED
-One 5V power indicator
-One DONE indicator
-Two HDMI hot-plug indicators
-Six LEDs
Memory
-64Mbit external HyperRAM
-64Mbit external SPI flash
GPIO
-8 extended I/Os
HDMI
-One HDMI TX Interface
-One HDMI RX Interface
DC-DC(LDO) Power
-3.3 V, 2.8V, 2.5V, 1.8V,1.2V and 1.0V supported

List of Tables
DBUG378-1.0E
9
2.6 Development Board Description
Table 2-1 Development Board Description
No. Name Functional Description Conditions Remarks
1 FPGA Core chip – –
2 Download USB interface; MSPI
supported
USB to JTAG chip integrated on board –
3 Power Supply
3.3 V, 2.8V, 2.5V,
1.8V,1.2 V, 1.0V output
via DC-DC(LDO) circuit

Input power: 5V
Provide power for FPGA, download,
HDMI and other circuits via 5V to 3.3
V circuit;
Provide power for camera input via
5V to 2.8V circuit;
Provide power for FPGA and HDMI
RX via 5V to 2.5V circuit;
Provide power for FPGA PSRAM
and HyperRAM via 5V to1.8V circuit;
Provide power for camera input via
5V to 1.2V circuit;
Provide power for FPGA via 2.8V to
1.0V circuit.
–
4 Switch FPGA Power switch 1 –
5 Reset key FPGA reset 1 –
6 LED
Test indicator, hot plug
indicator and power
indicator

Six test indicators;
Two hot plug indicators;
One DONE indicator;
One power indicator.
–
7 Crystal
Oscillator
Provide 27MHz clock
for FPGA Package2520 –
8 Memory Provide PSRAM and
Flash
64Mbit external HyperRAM
64Mbit external SPI flash –
9 GPIO I/O for user to extend
and test
8 –
10 HDMI For design use.
One HDMI TX Interface and one HDMI
RX Interface –
11 FPC
connector For camera input 24PIN FPC –
12 Protection
USB interface with
ESD protection;
Power interface
with inverse and
over current
USB interface with ESD protection:
±15kV non-contact discharge and ±
8kV contact discharge;
Schottky diode is connected
between positive and negative
–

2 Introduction
2.6 Development Board Description
DBUG378-1.0E
10(25)
No. Name Functional Description Conditions Remarks
protection;
HDMI interface
with ESD
protection.
anodes of power interface;
2A self-recovery fuses are
connected at power input
HDMI interface with ESD protection:
±15kV non-contact discharge and ±
8kV contact discharge;
13 Voltage – Input Voltage: 5V –
14 Humidity – 95% –
15 Temperature – Operating range: -40°~85° –

3 Development Board Circuit
3.1 FPGA Module
DBUG378-1.0E
11
3Development Board Circuit
3.1 FPGA Module
Overview
For the resources of GW2A series of FPGA Products, see DS102,
GW2A series of FPGA Products Data Sheet.
I/O BANK Introduction
For the I/O BANK, package and pinout information, see UG111, GW2A
series of FPGAProducts Package and Pinout Manual for more details.
3.2 Download
3.2.1 Overview
The development board provides an USB download interface. The
bitstream file can be downloaded to the internal SRAM, or the external SPI
flash as needed.
Note!
When downloaded to SRAM, the bitstream file will be lost if the device is powered
down, and it will need to be downloaded again after power-on.
If downloaded to SPI flash, the bitstream file will not be lost if the device is powered
down.

3 Development Board Circuit
3.2 Download
DBUG378-1.0E
12(25)
3.2.2 USB Download Circuit
Figure 3-1 FPGA USB Download Diagram
F_TMS
F_TCK
F_TDI
F_TDO
USB to JTAG
Chip
USB_D+
USB_D-
N20
N22
M20
M22
U1
U17
GW2A-
LV55PG484
3.2.3 Download Flow
1. FPGA SRAM Download Mode:
Plug the USB cable to the USB interface (J7) on the development
board. Power on, open the Programmer, select SRAM mode, and then
select the bitstream file you required.
2. FPGA MSPI Download Mode:
Plug the USB cable to the USB interface (J7) on the development
board, then power on. Open the Programmer, select External Flash
mode, and then select the bitstream file and FLASH you required. Turn
off the power after downloading. Power on, and then the device will
import the bitstream file to SRAM from the external Flash.
3.2.4 Pinout
Table 3-1 FPGA Download Pinout
Name Pin No. BANK Description I/O Level
TMS N22 2 JTAG Signal 3.3V
TCK N20 2 JTAG Signal 3.3V
TDI M20 2 JTAG Signal 3.3V
TDO M22 2 JTAG Signal 3.3V
MODE0 T22 3 Mode selection pin 3.3V
MODE1 U22 3 Mode selection pin 3.3V
MODE2 U21 3 Mode selection pin 3.3V

3 Development Board Circuit
3.3 Power Supply
DBUG378-1.0E
13(25)
3.3 Power Supply
3.3.1 Overview
DC5V is input by J6. The PAM2306AYPAA and TPS7A7001 power
supply chip are used to step down voltage from 5V to 3.3V, 2.8V, 2.5V, 1.8V,
1.2V and 1.0V, which can meet the power demands of the development
board.