GOWIN GW1NRF Series User manual

GW1NRF series of Bluetooth FPGA Products
Package and Pinout User Guide
UG893-1.0E, 11/12/2019

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Revision History
Date
Version
Description
11/12/2019
1.0E
Initial version published.

Contents
UG893-1.0E
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Contents
Contents.................................................................................................................i
List of Figures.....................................................................................................ii
List of Tables......................................................................................................iii
1 About This Guide.............................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Related Documents............................................................................................................1
1.3 Terminology and Abbreviations........................................................................................... 1
1.4 Support and Feedback .......................................................................................................2
2 Overview...........................................................................................................3
2.1 PB-Free Package ...............................................................................................................3
2.2 Package, Max. User I/O Information, and LVDS Paris.......................................................3
2.3 Power Pin ...........................................................................................................................4
2.4 Pin Quantity........................................................................................................................ 4
2.4.1 Quantity of GW1NRF-4B Pins.........................................................................................4
2.5 Pin Definitions.....................................................................................................................5
2.6 I/O BANK Introduction ........................................................................................................7
3 View of Pin Distribution ..................................................................................8
3.1 View of GW1NRF-4B Pins Distribution...............................................................................9
3.1.1 View of QN48 Pins Distribution .......................................................................................9
3.1.2 View of QN48E Pins Distribution...................................................................................10
4 Package Diagrams......................................................................................... 11
4.1 QN48 Package Outline (6mm x 6mm)..............................................................................12

List of Figures
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List of Figures
Figure 2-1GW1NRF series of Bluetooth FPGAproducts I/O Bank Distribution ................................7
Figure 3-1 View of GW1NRF-4B QN48 Pins Distribution (Top View)................................................ 9
Figure 3-2 View of GW1NRF-4B QN48E Pins Distribution (Top View) .............................................10
Figure 4-1 Package Outline QN48..................................................................................................... 12

List of Tables
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List of Tables
Table 1-1 Abbreviation and Terminology............................................................................................1
Table 2-1 Package, Max. User I/O Information, and LVDS Paris ......................................................3
Table 2-2 Other Pins in the GW1NRF Series .................................................................................... 4
Table 2-3 Quantity of GW1NRF-4BPins ............................................................................................. 4
Table 2-4 Definition of the Pins in the GW1NRF series of Bluetooth FPGAproducts....................... 5
Table 3-1 Other pins in GW1NRF-4B QN48...................................................................................... 9
Table 3-2 Other pins in GW1NRF-4B QN48...................................................................................... 10

1About This Guide
1.1Purpose
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1About This Guide
1.1 Purpose
This manual contains an introduction to the GW1NRF series of
Bluetooth FPGA products together with a definition of the pins, list of pin
numbers, distribution of pins, and package diagrams.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI Website. You
can find the related documents at www.gowinsemi.com:
1. DS891, GW1NRF series of Bluetooth FPGAproducts Data Sheet
2. UG290, Gowin FPGAProducts Programming and Configuration User
Guide
3. UG893, GW1NRF series of Bluetooth FPGAproducts Package and
Pinout
4. UG892, GW1NRF-4B Pinout
1.3 Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown in
Table 1-1 below.
Table 1-1 Abbreviation and Terminology
Terminology and Abbreviations
Full Name
FPGA
Field Programmable Gate Array
SIP
System in Package
GPIO
Gowin Programmable IO
QN48
QFN48
QN48E
QFN48E

1About This Guide
1.4Support and Feedback
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1.4 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly by the following ways.
Website: www.gowinsemi.com.cn
E-mail: [email protected]

2Overview
2.1PB-Free Package
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2Overview
The GW1NRF series of FPGA products are the first generation
products in the LittleBee®family and represent one form of SoC FPGA.
The GW1NRF series of FPGA products integrate 32 bits hardcore
processor and support Bluetooth 5.0 Low Energy radio. They have
abundant logic units, IOs, built-in B-SRAM and DSP resources, power
management module, and security module. The GW1NRF series provides
low power consumption, instant on, low cost, non-volatile, high security,
various packages, and flexible usage.
2.1 PB-Free Package
The GW1NRF series of Bluetooth FPGA products are PB free in line
with the EU ROHS environmental directives. The substances used in the
GW1NRF series of Bluetooth FPGAproducts are in full compliance with the
IPC-1752 standards.
2.2 Package, Max. User I/O Information, and LVDS Paris
Table 2-1 Package, Max. User I/O Information, and LVDS Paris
Package
Pitch (mm)
Size (mm)
GW1NRF-4B
QN48
0.4
6 x 6
25(4)
QN48E
0.4
6 x 6
25(4)
Note!
In this manual, abbreviations are employed to refer to the package types. See
1.3Terminology and Abbreviations.
See GW1NRF series of Bluetooth FPGA Products Data Sheet for more details.
The JTAGSEL_N and JTAG pins cannot be used as I/O simultaneously. The data in
this table is when the loaded four JTAG pins (TCK, TDI, TDO, and TMS) are used as
I/O;

2Overview
2.3Power Pin
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2.3 Power Pin
Table 2-2 Other Pins in the GW1NRF Series
VCC
VCCO0
VCCO1
VCCO2
VCCO3
VCCX
VSS
2.4 Pin Quantity
2.4.1 Quantity of GW1NRF-4B Pins
Table 2-3 Quantity of GW1NRF-4BPins
Pin Type
GW1NRF-4B
QN48
QN48E
I/O Single end /
Differential pair /
LVDS1
BANK0
9/4/0
9/4/0
BANK1
4/1/1
4/1/1
BANK2
8/4/3
8/4/3
BANK3
4/1/0
4/1/0
Max. User I/O 2
25
25
Differential Pair
10
10
True LVDS output
4
4
VCC
2
2
VCCX
1
1
VCCO0/VCCO33
1
1
VCCO1/VCCO23
1
1
VSS
2
1
MODE0
0
0
MODE1
0
0
MODE2
0
0
JTAGSEL_N
1
1
Note!
[1] The number of single end/ differential/LVDS I/O includes CLK pins and download
pins;
[2]The JTAGSEL_N and JTAG pins cannot be used as I/O simultaneously. The data
in this table is when the loaded four JTAG pins (TCK, TDI, TDO, and TMS) are used
as I/O; When mode [2:0] = 001, JTAGSEL_N and the four JTAG pins (TCK, TDI, TDO,
and TMS) can be used as GPIO simultaneously, and the Max. user I/O plus one.
[3]Pin multiplexing.