Texas Instruments CC3100 SimpleLink User manual

CC3100 and CC3200 SimpleLink™ Wi-Fi®and
Internet of Things Solution Layout Guidelines
User's Guide
Literature Number: SWRU370B
June 2014–Revised August 2018

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Table of Contents
Contents
1 Trademarks......................................................................................................................... 4
2 Device Overview ................................................................................................................. 5
3 PCB Specification ................................................................................................................ 5
3.1 PCB Stack-Up ............................................................................................................ 5
3.2 PCB Design Rules ....................................................................................................... 6
3.3 Layer Information......................................................................................................... 6
4 Layout Information............................................................................................................... 7
4.1 Placement of Components.............................................................................................. 7
4.2 Layer Information......................................................................................................... 8
5 Layout Guidelines .............................................................................................................. 12
5.1 RF......................................................................................................................... 12
5.2 Power..................................................................................................................... 16
5.3 Clock ..................................................................................................................... 17
5.4 Digital I/O ................................................................................................................ 17
5.5 QFN Ground............................................................................................................. 18
5.6 Recommended Footprint .............................................................................................. 19
6 Summary........................................................................................................................... 20
7 Additional References......................................................................................................... 20
Revision History.......................................................................................................................... 21

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List of Figures
List of Figures
1 Example Stack-up ........................................................................................................... 5
2 CC3100BOOST 3.3-A Placement Diagram .............................................................................. 7
3 Layer-1 ........................................................................................................................ 8
4 Layer-2 ........................................................................................................................ 9
5 Layer-3....................................................................................................................... 10
6 Layer-4....................................................................................................................... 11
7 RF Section Layout ......................................................................................................... 12
8 Filter Routing................................................................................................................ 14
9 Coplanar Waveguide (Cross Section) With GND and via Stitching ................................................. 15
10 CPW With GND (Top View)............................................................................................... 15
11 7x7 Ground Vias on Ground Pad ........................................................................................ 18
12 Split Solder Paste Into Smaller Blocks .................................................................................. 18
13 Recommended Footprint.................................................................................................. 19
List of Tables
1 PCB Design Rules........................................................................................................... 6
2 4 Layer PCB.................................................................................................................. 6
3 Inductors ...................................................................................................................... 7
4 Antenna Guidelines ........................................................................................................ 13
5 Recommended Components ............................................................................................. 13
6 Characteristic of Recommended Antenna .............................................................................. 13
7 Filter Guidelines ............................................................................................................ 14
8 Characteristic of Recommended Filter .................................................................................. 15
9 Recommended Values for the PCB...................................................................................... 16
10 Power Management........................................................................................................ 16
11 Characteristic of Recommended 32K XTAL............................................................................ 17
12 Characteristic of Recommended 40M XTAL............................................................................ 17

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CC3100 and CC3200 SimpleLink™ Wi-Fi®and Internet of Things Solution
Layout Guidelines
User's Guide
SWRU370B–June 2014–Revised August 2018
CC3100 and CC3200 SimpleLink™ Wi-Fi®and Internet of
Things Solution Layout Guidelines
..................................................................................................... Embedded Processing Applications
ABSTRACT
This document provides the design guidelines of a 4-layer PCB board, for the CC31xx and CC32xx
SimpleLink™ Wi-Fi®family of devices. The CC31xx and CC32xx are easy to lay-out, QFN-packaged
devices. Optimize the board’s performance by following these suggestions during the board’s design. The
first section is a brief overview of the SimpleLink Wi-Fi family of devices. The second section focuses on
the PCB specification; the third section addresses components placement, and board layer information.
The last section, on layout guidelines, covers the board’s main sections such as RF, power, clock, digital
I/O, and the ground. Each section can be read independently.
In addition to this document, TI recommends verifying the schematic board design with the associated
schematic checklist.
1 Trademarks
SimpleLink, Internet-on-a-chip, E2E are trademarks of Texas Instruments.
ARM, Cortex are registered trademarks of ARM Limited.
Wi-Fi is a registered trademark of Wi-Fi Alliance.
All other trademarks are the property of their respective owners.

Type Layer Height(um)
Mask 25
Copper L1 35
FR-4 255
Copper L2 35
FR-4 350
Copper L3 35
FR-4 255
Copper L4 35
Mask 25
Total 1050
Total thickness ~ 1.1mm (+/- 10%)
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CC3100 and CC3200 SimpleLink™ Wi-Fi®and Internet of Things Solution
Layout Guidelines
2 Device Overview
Start the design with the industry’s first Internet-on-a-chip™. Created for the Internet of Things (IoT), the
SimpleLink Wi-Fi family has several variants. The CC3100 SimpleLink Wi-Fi and IoT solution dramatically
simplifies the implementation of Internet connectivity. This product integrates all protocols for Wi-Fi and
Internet, which greatly minimizes host microcontroller (MCU) software requirements. CC3200 device is a
wireless MCU that integrates a high-performance ARM®Cortex®-M4 MCU with the CC3100 network
processor subsystem, allowing customers to develop an entire application with a single IC. With on-chip
Wi-Fi, Internet, and robust security protocols, no prior Wi-Fi experience is needed for faster development.
SimpleLink Wi-Fi is a complete platform solution, including various tools and software, sample
applications, user and programming guides, reference designs, and the TI E2E™ support community. The
devices are available in an easy to lay-out QFN package. The layout for both devices are similar, with a
higher number of IOs routed for the CC3200.
3 PCB Specification
3.1 PCB Stack-Up
An example stack-up is shown in Figure 1, used for the construction of the CC3100BOOST Rev3.3-A. The
user can alter the layer stack-up based on their requirements, but the impedance of the 50-Ωlines should
be recalculated. Having the L1-L2 distance reduced helps improve the grounding and the RF decoupling.
TI recommends keeping the L1-L2 distance similar to the recommended value.
Figure 1. Example Stack-up

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Layout Guidelines
3.2 PCB Design Rules
Table 1. PCB Design Rules
Parameter Value Comments
Number of layers 4
Thickness 1.1 mm ±
10% For greater thickness increase the distance between L2 and L3
Size of PCB 2.0” x 1.7”
Solder mask Red Can be replaced with any color
Dielectric FR4
Silk White Can be replaced with any color
Surface finish ENIG
Min track width 6 mils Min track width can be reduced but cost would be higher
Min spacing 6 mils Min spacing can be reduced but the cost would be higher
Mid drill diameter 8 mils 12-mil diameter drill is used on the Rev 3.3-A board
Copper thickness 1 oz
Lead free / ROHS Yes
Impedance control Yes 50-Ωcontrolled impedance trace of 18-mils width on L1 w.r.t L2 (GND).
Air gap = 15 mils
Note: The above calculations are based on CPW-G (NOT microstrip).
Impedance variation 5%
3.3 Layer Information
The 4-layer PCB is used with the configuration, as shown in Table 2.
Table 2. 4 Layer PCB
Layer Usage Notes
1 Signal + RF RF trace is a CPW on L1 w.r.t. L2 ground
2 GND Reference plane for RF
3 Power + signal The power planes for the power amplifier (PA), analog blocks and the main input supply are routed on
this layer
4 Power + signal

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4 Layout Information
The complete layout package is available for download on the TI website at http://www.ti.com/tool/cc3200-
launchxl-rd and http://www.ti.com/tool/cc3100boost-rd. TI recommends that the customers copy the exact
layout of the engine area to ensure optimum performance as measured on the CC3x00 reference boards.
4.1 Placement of Components
The components placement on the CC3100 BoosterPack is provided in Figure 2. This placement provides
optimum performance of the device. Great care must be taken for the power inductors components to
ensure reduced emissions and optimum EVM and mask performance. The power inductors should be
placed close to the device, and the power traces should be minimized. The CC3x00 device is sensitive to
the layout of the DC-DC converter, which can impact the performance of the device. For the main
inductors at the analog, power amplifier, and digital DC-DC output, see Table 3.
Table 3. Inductors
Inductor @ Value Size Current Rating Recommended PN Description
ANA DCDC OUT 2.2 µH 1008 1.3A LQM2HPN2R2MG0L INDUCTOR 2.2UH 20% 1008
PA DCDC OUT 1 µH 1008 1.5A LQM2HPN1R0MJ0L INDUCTOR 1UH 20% 1008
DIG DCDC OUT 2.2 µH 1008 1.3A LQM2HPN2R2MG0L INDUCTOR 2.2UH 20% 1008
Figure 2. CC3100BOOST 3.3-A Placement Diagram

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4.2 Layer Information
4.2.1 Layer-1
Most of the routing is performed on Layer-1 to avoid vias on the board (see Figure 3). The trace widths
are maximized for high-current pins and minimized for signal pins. For example, the signal pins can be
routed with 6 mils (4 mils, if possible) and the power pins with 12 mils and above.
Figure 3. Layer-1

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CC3100 and CC3200 SimpleLink™ Wi-Fi®and Internet of Things Solution
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4.2.2 Layer-2
Layer-2 is primary ground plane for the board reference (see Figure 4). It has a void for the antenna
section, which is per the antenna guidelines. This return current path for the input de-coupling capacitors
(C11, C13, and C18) is routed on L2 using thick traces to isolate RF ground from a noisy supply ground.
This is also required to meet the IEEE spectral mask specifications.
Figure 4. Layer-2

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4.2.3 Layer-3
Layer-3 is used to route the power lines to the device (see Figure 5). Power planes are necessary for the
power amplifier (PA) and the main supply input to the device. More details are available in subsequent
sections.
Figure 5. Layer-3