HP E2470A User manual

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User’s Guide
Publication Number E2470-97001
First Edition, February 1996
For Safety Information, Warranties, and Regulatory Information, see the
pages at the end of this manual.
Copyright Hewlett-Packard Company 1995, 1996
All Rights Reserved.
HP E2470A MC68HC16Y1
Preprocessor Interface

The HP E2470A Preprocessor
Interface—At a Glance
The HP E2470A Preprocessor Interface provides a complete interface for
state or timing analysis between any Motorola MC68HC16Y1 target system
and the following HP logic analyzers:
•HP 16550A (one-card)
•HP 16554A/55A/56A (one-card)
•HP 1660A/61A/62A
•HP 1660AS/61AS/62AS
For this preprocessor, two configuration files are provided for each analyzer:
one for timing measurements and one for state measurements. These files
allocate channels, label buses, and label individual signals according to the
predefined format of the preprocessor connectors. For state measurements,
an inverse assembler converts captured microcontroller instruction cycles
into MC68HC16Y1 assembly language mnemonics.
The slide switches are used to inform the inverse assembler about the
microcontroller configuration. The user must set these switches
appropriately before making a state measurement.
The interface contains 13 connectors: 7 for timing measurements, 4 for state
measurements, and 2 for the background debug monitor (BDM) interface.
The timing connectors present raw microcontroller signals to the logic
analyzer, while the state connectors present both raw and generated signals.
The BDM interface provides easy connection for an external controller to
view and alter microcontroller registers and system memory.
The HP E2470A is attached to the target system via an HP E5335A probe
adapter.
ii

HP E2470A Preprocessor Interface
Introduction
The HP E2470A Preprocessor Interface—Ata Glance
iii

In This Book
This book is the user’s guide for the HP E2470A Preprocessor Interface. It
assumes that you have a working knowledge of the logic analyzer used and
the microcontroller being analyzed.
This user’s guide is organized into three chapters:
Chapter 1 explains how to attach the preprocessor to the target and
how to configure the logic analyzer for state and/or timing analysis.
Chapter 2 provides reference information on the format specification
and symbols configured by the preprocessor interface software and
information about the inverse assemblers and status encoding.
Chapter 3 contains reference information on the preprocessor
interface hardware, including the characteristics and signal mapping
for the preprocessor interface.
For more information on the logic analyzers or microcontroller, refer to the
appropriate reference manual for those products.
Introduction
The HP E2470APreprocessor Interface—At a Glance
iv

Contents
1 Setting Up the Preprocessor Interface
Before You Begin 1–3
Setting Up the Preprocessor Interface Hardware 1–4
To power up or power down 1–5
To protect the preprocessor interface when not in use 1–5
To set the slide switches 1–5
To connect to the target system 1–7
To connect the termination adapters 1–8
Using the flex adapter 1–8
Connecting to the Logic Analyzer 1–10
To connect to the HP 16550A one-card analyzer 1–10
To connect to the HP 16554A/55A/56A analyzer 1–11
To connect to the HP 1660A/AS analyzer 1–11
To connect to the HP 1661A/AS analyzer 1–12
To connect to the HP 1662A/AS analyzer 1–12
Loading the Preprocessor Interface Software 1–13
To load the configuration and inverse assembler 1–13
To connect to the Background Debug Monitor interface 1–14
2 Analyzing the Motorola MC68HC16Y1
Displaying Information 2–3
To display the format specification 2–3
To display the configuration labels and symbols 2–5
To display captured state data 2–7
Using the Inverse Assembler 2–8
To use the inverse assembly options 2–10
To synchronize the inverse assembler 2–11
Inverse assembler error messages 2–12
v

3 Preprocessor Interface Hardware Reference
Operating Characteristics 3–3
Theory of Operation and Clocking 3–4
Signal-to-Connector Mapping 3–7
State Connector Signal Definition 3–7
Timing Connector Signal Definition 3–10
PQFP to PGA Connector Signal Definition 3–14
Circuit Board Dimensions 3–21
Repair Strategy 3–22
A If You Have a Problem
Intermittent data errors A–3
Unwanted triggers A–3
No activity on activity indicators A–4
No trace list display A–4
Target system will not boot up A–5
Erratic trace measurements A–6
Capacitive loading A–6
No inverse assembly or incorrect inverse assembly A–7
Inverse assembler will not load or run A–8
An event wasn’t captured by one of the modules A–9
Messages A–10
“. . . Inverse Assembler Not Found” A–10
“Measurement Initialization Error” A–11
“No Configuration File Loaded” A–11
“Selected File is Incompatible” A–11
“Slow or Missing Clock” A–11
“Waiting for Trigger” A–12
Contents
vi

1
Setting Up the Preprocessor
Interface

Setting Up the Preprocessor Interface
This chapter explains how to set up the HP E2470A Preprocessor Interface
hardware and software, configure the preprocessor, and connect the
preprocessor to supported logic analyzers.
1–2

Before You Begin
This section lists the logic analyzers supported by the HP E2470A and
provides other information about the analyzers and the preprocessor
interface.
Equipment Supplied
•The preprocessor interface circuit card.
•The configuration and inverse assembler software on a 3.5-inch disk.
•This User’s Guide.
Minimum Equipment Required
•The HP E2470A preprocessor interface.
•The HP E5335A probe adapter.
•The configuration and inverse assembler software on a 3.5-inch disk.
•One of the logic analyzers listed in the following table:
Logic Analyzers Supported
Logic Analyzer Channel Count State Speed Timing Speed MemoryDepth
16550A
(one card) 102 100 MHz 250 MHz 4 k states
16554A
(one card) 68 70 MHz 125 MHz 512 k states
16555A
(one card) 68 110 MHz 250 MHz 1 M states
16556A
(one card) 68 100 MHz 200 MHz 1 M states
1660A/AS 136 100 MHz 250 MHz 4 k states
1661A/AS 102 100 MHz 250 MHz 4 k states
1662A/AS 68 100 MHz 250 MHz 4 k states
1–3

Setting Up the Preprocessor Interface
Hardware
Setting up the preprocessor interface hardware consists of the
following major steps:
•Turn off the logic analyzer and the target system.
CAUTION To protect your equipment, remove the power from both the logic analyzer
and the target system before you make or break connections. Because the
logic analyzer supplies power to the preprocessor interface, the logic
analyzer should always be powered up before the target system; when
powering down, power down the target system first and then power down
the logic analyzer.
•Set the slide switches on the top of the preprocessor interface
according to the configuration of the MC68HC16Y1.
•Attach the HP E5335A probe to the target system.
•Attach the preprocessor interface to the HP E5335A probe.
•Connect the logic analyzer pods to the cable connectors of the
preprocessor interface board.
•Load the appropriate configuration file.
The remainder of this section describes these general steps in more
detail.
SettingUp thePreprocessor Interface Hardware
1–4

To power up or power down
When powering up, the logic analyzer must be powered up first, followed by
the target system. The logic analyzer provides the power to the active
circuits on the preprocessor interface. Unpowered circuits may cause
improper operation of the target system.
When powering down, the target system should be powered down first,
followed by the logic analyzer.
To protect the preprocessor interface when not in use
•Cover the socket assembly pins of the preprocessor interface with a
conductive foam wafer or conductive plastic pin protector.
The socket assembly pins of the preprocessor interface were covered at the
time of shipment with either a conductive foam wafer or conductive pin
protector. If this device is not damaged, it may be reused repeatedly.
•Store the preprocessor interface in an antistatic bag or container.
Electrostatic Discharge The socket assembly pins of the preprocessor interface should be covered
with a conductive foam wafer or pin protector to protect the delicate gold
plated pins of the assembly from damage due to impact. Covering the pins
and properly storing the preprocessor interface also protects the active
circuitry on the preprocessor interface from electrostatic discharge.
To set the slide switches
The slide switches are used to inform the inverse assembler about the MCU
configuration when making state measurements. The switches perform three
functions. First, they validate a multi-function pin as an MCU signal versus a
general purpose input/output for direct use by the inverse assembler.
Second, they validate a multi-function pin as an MCU signal versus a general
purpose input/output for use in generating signals to be used by the inverse
assembler. Third, the slide switches direct the logic analyzer to capture bus
cycles generated by other bus masters and/or debug controllers. They must
be set appropriately for correct inverse assembly.
The overlay supplied with the preprocessor card labels the function of each
switch and shows the position of valid and invalid settings. You may wish to
refer to it as each switch is being discussed below.
SettingUp thePreprocessor Interface Hardware
To power up or power down
1–5

Ten switches validate the chip select signals (CS0, CSM, CSE, CS3, CS5-10).
Signals A19—A23 and CS6—CS10 are multiplexed onto the same pins, and the
defaultconfiguration filefor thelogic analyzer assumes that signals A19—A23
are valid. If anyof the chip selects, CS6—CS10, arebeing used and the
appropriate switch(es) are set to VALID on the preprocessor, thenthe bits
associated with A19—A23shouldbe removed from the ADDR label via the
format menu in the logic analyzer. This correspondsto bits 3—7 of logic
analyzerpod P4. This results in the display of correct address informationin the
ADDR field of thelisting menu and presents only validaddress busbits to the
ADDR field in the trigger menu.
•If the MC68HC16Y1 configuration is using any of the chip selects, set
the associated switch to the VALID position. Set all others to the
INVALID position.
Six switches are used to validate control signals from the MCU. They are:
SIZ0, SIZ1, DSACK0, DSACK1, AS, and DS.
In orderto distinguish between internal and external buscycles, the
preprocessormust have one of the following combinations: DS and AS must be
valid or DS and at least one CS must be valid. If DS isthe onlyvalid control
signal, all cycles will be interpreted asinternal cycles.
Two switches are used to capture bus cycles not associated with the
execution of user code. ACQNONMCU controls whether the logic analyzer
acquires bus cycles caused by other bus masters in the target system
(BGACK asserted). ACQBKGND controls whether the logic analyzer acquires
bus cycles caused by a controller performing debug commands (FREEZE
asserted).
•If the MC68HC16Y1 configuration is using BGACK and/or FREEZE
and you want to capture these cycles, set the associated switch to the
VALID position. Otherwise, set the associated switch to the INVALID
position.
SettingUp thePreprocessor Interface Hardware
To setthe slide switches
1–6

To connect to the target system
The preprocessor interface requires a probe adapter for connecting to the
MC68HC16Y1 microcontroller. The probe adapter assembly allows the
preprocessor interface to be connected without removing the microcontroller
from the target system.
•To prevent equipment damage, remove power from both the logic
analyzer and the target system.
•Using the instructions in the HP E5335A probe adapter manual,
connect the probe adapter assembly to the target system
microcontroller. Ensure that pin 1 is properly aligned.
CAUTION Serious damage to the target system or preprocessor interface can result
from incorrect connection. Note the position of pin 1 and pin A1 on the
preprocessor interface, probe adapter assembly, and microcontroller prior
to making any connection. Also, take care to align the preprocessor
interface connector with the pins on the probe adapter assembly so that all
pins are making contact.
•Install the preprocessor interface into the PGA socket on the PQFP
probe adapter. Again, ensure that pin A1 is properly aligned.
Preprocessor Interface Assembly
SettingUp thePreprocessor Interface Hardware
To connectto thetarget system
1–7

To connect the termination adapters
The logic analyzer probes must be terminated for correct operation.
The nonterminated connectors, P1 through P7, must be probed by using
either the General Purpose probes (shipped with the logic analyzer) or the
100 kOhm Termination Adapters (HP part number 01650-63203).
•Align the key on the male end of the termination adapter with the slot
on the connector of one of the logic analyzer cables. Push the
termination adapter into the connector.
•Connect the female end of the termination adapter to the
preprocessor interface.
Connecting the Termination Adapter
Using the flex adapter
The HP E3445A flex adapter is designed to relieve mechanical stress and to
provide a degree of freedom between the probe adapter and the
preprocessor.
SettingUp thePreprocessor Interface Hardware
To connect the termination adapters
1–8

•Choose an orientation for the best physical arrangement of the
preprocessor.
The orientation will not affect electrical performance.
•Attach the flex adapter to the probe adapter.
•Fold the open end of the flex adapter onto itself.
Note the location of Pin 1 on the microcontroller.
•Position and attach the preprocessor to the flex adapter aligning
preprocessor pin A1 directly above the microcontroller pin 1.
Flex AdapterDiagram
The flexadapter contains a15 x15 arrayof pinswhile the preprocessor
containsonly 14 x14. When the flex adapter is folded over, there is a1:1
correspondencebetween vertical pins. Be sure to attach the preprocessor to
the appropriate set of pinsattached to the target.
SettingUp thePreprocessor Interface Hardware
Using the flex adapter
1–9

Connecting to the Logic Analyzer
Use the following tables and illustrations to connect the logic analyzer
to the preprocessor interface.
To connect to the HP 16550A one-card analyzer
1. Connectthe pod cables to the preprocessor interface according to the pod diagram below.
2. Forstate, load configuration file F68HC16S. For timing, load configuration file F68HC16T.
1–10

To connect to the HP 16554A/55A/56A analyzer
1. Connectthe pod cables to the preprocessor interface according to the pod diagram below.
2. Forstate, load configuration file M68HC16S. For timing, load configuration file M68HC16T.
To connect to the HP 1660A/AS analyzer
1. Connectthe pod cables to the preprocessor interface according to the pod diagram below.
2. Forstate, load configuration file F68HC16S. For timing, load configuration file F68HC16T.
Connecting to theLogic Analyzer
To connect to the HP 16554A/55A/56A analyzer
1–11

To connect to the HP 1661A/AS analyzer
1. Connectthe pod cables to the preprocessor interface according to the pod diagram below.
2. Forstate, load configuration file F68HC16S. For timing, load configuration file F68HC16T.
To connect to the HP 1662A/AS analyzer
1. Connectthe pod cables to the preprocessor interface according to the pod diagram below.
2. Forstate, load configuration file F68HC16S. For timing, load configuration file F68HC16T.
Connecting to the Logic Analyzer
To connect to the HP 1661A/AS analyzer
1–12

Loading the Preprocessor Interface Software
The logic analyzer can be configured for MC68HC16Y1 analysis by
loading the appropriate configuration file. Loading the state file
automatically loads the inverse assembler file.
To load the configuration and inverse assembler
1Make a duplicate copy of the master disk prior to setting up the
preprocessor interface.
2Insert the HP E2470A disk in the front disk drive of the logic analyzer.
3Depending on your logic analyzer, select one of the following menus:
•For the HP 1660-series logic analyzers, select the "System Disk" menu
•For the HP 16500A mainframe, select the "System Front Disk" menu
•For the HP 16500B mainframe, select the "System Flexible Disk"
menu
4Configure the menu to "Load" the analyzer configuration from disk.
5Select the appropriate module (such as "100/500 MHz LA" or
"Analyzer") for the load.
6Use the knob to select the appropriate configuration file.
Choosing the correct configuration file depends on which analyzer you are
using and whether you need timing or state analysis. The file names are
listed at the bottom of the illustrations showing the connections for your
particular logic analyzer.
7Execute the load operation to load the file into the logic analyzer.
1–13