iWave i.MX6 Qseven PMIC SOM Installation manual

REL 1.2
Page 1 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
iW-RainboW-G15M
i.MX6 Qseven PMIC SOM
Hardware User Guide

REL 1.2
Page 2 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Document Revision History
Document Number
iW-PRDVZ-UM-01-R5.0-REL1.2-Hardware
Revision
Date
Description
1.0
11th Sep 2014
Official Release Version
1.1
28th Jan 2015
Qseven Edge connector pin details are udpated in Table 5 for pins 20,28,120,121,
154 & 204
Heat spreader part number for i.MX6DL/S Qseven PMIC SOM is updated in
ORDERING INFORMATION
Figure 15 and Figure 16 are updated with tolerance information
Table 17 updated with Power consumption details
1.2
07th Mar 2016
Table 8 PMIC OTP Header pinout detail is corrected
Table 11 Debug UART Header pinout detail is corrected
Important Note is added below Table 16 for power sequencing related
i.MX6 QuadPlus and DualPlus CPU supported Qseven SOM part numbers are
updated in ORDERING INFORMATION
2GB RAM supported Qseven SOM part numbers are updated in ORDERING
INFORMATION
PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do
not read this document if you are not the intended recipient. Any review, use, distribution or disclosure by others
is strictly prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are
hereby notified that any disclosure, copying distribution or use of any of the information contained within this
document is STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”

REL 1.2
Page 3 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any Product
specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the
extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by
iWave Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or
inaccuracies in this document.
CPU and other major components used in this product may have several silicon errata associated with it. Under no
circumstances, iWave Systems shall be liable for the silicon errata and associated issues.
Trademarks
All registered trademarks, product names mentioned in this publication are the property of their respective owners
and used for identification purposes only.
Certification
iWave Systems Technologies Pvt. Ltd. is an ISO 9001:2008 Certified Company.
Warranty & RMA
Warranty support for Hardware: 1 Year from iWave or iWave's EMS partner.
For warranty terms, go through the below web link,
http://www.iwavesystems.com/support/warranty.html
For Return Merchandise Authorization (RMA), go through the below web link,
http://www.iwavesystems.com/support/rma.html
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our customers so that
our Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Email : [e-mail]
Website : www.iwavesystems.com
Address : iWave Systems Technologies Pvt. Ltd.
# 7/B, 29th Main, BTM Layout 2nd Stage,
Bangalore, Karnataka,
India –560076

REL 1.2
Page 4 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table of Contents
1. INTRODUCTION ............................................................................................................................................ 7
1.1 Purpose ............................................................................................................................................................. 7
1.2 Qseven SOM Overview ..................................................................................................................................... 7
1.3 List of Acronyms................................................................................................................................................ 7
1.4 Terminlogy Description..................................................................................................................................... 9
1.5 References ........................................................................................................................................................ 9
1.6 Important Note ............................................................................................................................................... 10
2. ARCHITECTURE AND DESIGN....................................................................................................................... 11
2.1 i.MX6 Qseven PMIC SOM Block Diagram........................................................................................................ 11
2.2 i.MX6 Qseven PMIC SOM Features................................................................................................................. 12
2.3 i.MX6 CPU ....................................................................................................................................................... 14
2.4 PMIC................................................................................................................................................................ 15
2.5 Boot Switches.................................................................................................................................................. 15
2.5.1 Boot Mode Switch ....................................................................................................................................... 16
2.5.2 Boot Media Setting Switch..........................................................................................................................17
2.6 Memory........................................................................................................................................................... 18
2.6.1 DDR3 SDRAM .............................................................................................................................................. 18
2.6.2 SPI NOR Flash .............................................................................................................................................. 18
2.6.3 eMMC Flash ................................................................................................................................................18
2.6.4 Micro SD Slot ...............................................................................................................................................18
2.7 Qseven PCB Edge Connector .......................................................................................................................... 19
2.7.1 PCIe Interface ..............................................................................................................................................20
2.7.2 Data UART Interface (UART5) .....................................................................................................................20
2.7.3 Gigabit Ethernet Interface........................................................................................................................... 20
2.7.4 SATA Interface.............................................................................................................................................21
2.7.5 USB 2.0 Host Interface ................................................................................................................................ 21
2.7.6 USB 2.0 OTG Interface.................................................................................................................................22
2.7.7 SD/MMC Interface ......................................................................................................................................22
2.7.8 AC’97/I2S Audio Interface ...........................................................................................................................22
2.7.9 LVDS Display Interface ................................................................................................................................23
2.7.10 HDMI Interface............................................................................................................................................23
2.7.11 LPC/GPIO Interface...................................................................................................................................... 24
2.7.12 SPI Interface ................................................................................................................................................24
2.7.13 CAN Interface .............................................................................................................................................. 24
2.7.14 Power Input................................................................................................................................................. 25
2.7.15 Power Control Signals .................................................................................................................................25
2.7.16 Power Management Signals ....................................................................................................................... 25
2.7.17 PWM Interface ............................................................................................................................................ 26
2.7.18 WDOG Interface ..........................................................................................................................................26
2.7.19 I2C Interface ................................................................................................................................................26
2.7.20 Manufacturing/Debug UART Interface (UART2).........................................................................................26

REL 1.2
Page 5 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.8 Expansion Connector1 Interfaces ................................................................................................................... 42
2.8.1 Parallel LCD Display Interface .....................................................................................................................43
2.8.2 MIPI DSI Interface........................................................................................................................................ 43
2.8.3 Parallel Camera Interface1 ......................................................................................................................... 43
2.8.4 ESAI Interface ..............................................................................................................................................44
2.8.5 SPDIF Interface ............................................................................................................................................44
2.8.6 Data UART Interface (UART1 & UART3)......................................................................................................44
2.9 Expansion Connector2 Interfaces ................................................................................................................... 51
2.9.1 Parallel Camera Interface2 ......................................................................................................................... 52
2.9.2 MIPI CSI Interface........................................................................................................................................ 52
2.9.3 Memory Bus Interface................................................................................................................................. 53
2.9.4 Keypad Interface .........................................................................................................................................53
2.9.5 Data UART Interface (UART4) .....................................................................................................................53
2.9.6 MLB Interface.............................................................................................................................................. 53
2.10 Optional Features ........................................................................................................................................... 60
2.10.1 NAND Flash ................................................................................................................................................. 60
2.10.2 RTC Controller .............................................................................................................................................60
2.10.3 PMIC OTP Header........................................................................................................................................ 61
2.10.4 JTAG Header................................................................................................................................................62
2.10.5 Debug UART Header....................................................................................................................................64
2.10.6 Power IN Connector .................................................................................................................................... 65
3. TECHNICAL SPECIFICATION.......................................................................................................................... 66
3.1 Electrical Characteristics ................................................................................................................................. 66
3.1.1 Power Input Requirement ...........................................................................................................................66
3.1.2 Power Input Sequencing.............................................................................................................................. 67
3.1.3 Power Consumption ....................................................................................................................................68
3.2 Environmental Characteristics........................................................................................................................ 69
3.2.1 Environmental Specification........................................................................................................................69
3.2.2 Heat Spreader ............................................................................................................................................. 69
3.2.3 RoHS Compliance ........................................................................................................................................70
3.2.4 Electrostatic Discharge................................................................................................................................ 70
3.3 Mechanical Characteristics ............................................................................................................................. 71
3.3.1 Qseven SOM Mechanical Dimensions.........................................................................................................71
3.3.2 Guidelines to insert the Qseven SOM into Carrier board ............................................................................73
4. ORDERING INFORMATION .......................................................................................................................... 74
5. MIGRATION INFORMATION ........................................................................................................................ 78
6. APPENDIX I................................................................................................................................................. 80
6.1 i.MX6 Qseven PMIC SOM Silk Screen ............................................................................................................. 80
7. APPENDIX II................................................................................................................................................ 82
7.1 i.MX6 Qseven PMIC SOM Development Platform.......................................................................................... 82

REL 1.2
Page 6 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
List of Figures
Figure 1: i.MX6 Qseven SOM Block Diagram ..................................................................................................................11
Figure 2: i.MX6Q Simplified Block Diagram .................................................................................................................... 14
Figure 3: Boot Switches................................................................................................................................................... 15
Figure 4: Micro SD Slot....................................................................................................................................................18
Figure 5: Qseven PCB Edge Connector............................................................................................................................19
Figure 6: Expansion Connector1 .....................................................................................................................................42
Figure 7: Expansion Connector1 .....................................................................................................................................51
Figure 8: PMIC OTP Header............................................................................................................................................. 61
Figure 9: JTAG Header.....................................................................................................................................................62
Figure 10: Debug UART Header ......................................................................................................................................64
Figure 11: 2Pin Power Connector ................................................................................................................................... 65
Figure 12: Qseven SOM Power Sequence....................................................................................................................... 67
Figure 13: Heat Spreader Dimensions ............................................................................................................................70
Figure 14: Mechanical dimension of Qseven SOM- Top View........................................................................................ 71
Figure 15: Mechanical dimension of Qseven SOM- Bottom View..................................................................................72
Figure 16: Mechanical dimension of Qseven SOM- Side View ....................................................................................... 72
Figure 17: Qseven Module Insertion procedure.............................................................................................................73
Figure 18: Silk Screen Top View ...................................................................................................................................... 80
Figure 19: Silk Screen Bottom View ................................................................................................................................ 81
Figure 20: i.MX6 Qseven PMIC SOM Development Platform.........................................................................................82
List of Tables
Table 1: Acronyms & Abbreviations.................................................................................................................................. 7
Table 2: Terminology ........................................................................................................................................................ 9
Table 3: Boot Mode Settings Truth Table ....................................................................................................................... 16
Table 4: Compatible Magnetics ......................................................................................................................................21
Table 5: 230-Pin PCB Edge Connector Pin Assignment...................................................................................................27
Table 6: Expansion Connector1 Pin Assignment.............................................................................................................45
Table 7: Expansion Connector2 Pin Assignment.............................................................................................................54
Table 8: PMIC OTP Header Pin Assignment ....................................................................................................................61
Table 9: JTAG Header Pin Assignment ............................................................................................................................ 62
Table 10: JTAG Header - BOM......................................................................................................................................... 63
Table 11: Debug UART Header Pin Assignment.............................................................................................................. 64
Table 12: Debug UART Header - BOM ............................................................................................................................64
Table 13: 2Pin Power Connector.....................................................................................................................................65
Table 14: Power IN Connector - BOM.............................................................................................................................65
Table 15: Power Input Requirement............................................................................................................................... 66
Table 16: Power Sequence Timing..................................................................................................................................67
Table 17: Power Consumption¹.......................................................................................................................................68
Table 18: Environmental Specification ...........................................................................................................................69
Table 19: Orderable Product Part Numbers ...................................................................................................................74
Table 20: Differences between i.MX6 Qseven Non PMIC SOM and i.MX6 Qseven PMIC SOM .....................................78

REL 1.2
Page 7 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
1. INTRODUCTION
1.1 Purpose
This document is the Hardware User Guide for the i.MX6 Qseven System On Module based on the Freescale’s i.MX6
Applications Processor with PMIC. This board is fully supported by iWave Systems Technologies Pvt. Ltd. This Guide
provides detailed information on the overall design and usage of the i.MX6 Qseven System On Module from a
Hardware Systems perspective.
1.2 Qseven SOM Overview
The Qseven concept is an off-the-shelf, multi-vendor, Single-Board-Computer that integrates all the core
components of a common PC and is mounted onto an application specific carrier board. Qseven modules have a
standardized form factor of 70mm x 70mm and have specified pin outs based on the high speed MXM system
connector that has a standardized pin out regardless of the vendor. A single ruggedized MXM connector provides the
carrier board interface to carry all the I/O signals to and from the Qseven module.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
Table 1: Acronyms & Abbreviations
Acronyms
Abbreviations
ARM
Advanced RISC Machine
BOM
Bill of Material
BPP
Bits Per Pixel
BSP
Board Support Package
CAN
Controller Area Network
CEC
Consumer Electronics Control
CPU
Central Processing Unit
CSI
Camera Serial Interface
DDR3
Double Data Rate 3
DSI
Display Serial Interface
DVI
Digital Visual Interface
eCSPI
Enhanced Configurable Serial Peripheral Interface
eMMC
Enhanced Multi Media Card
ESAI
Enhanced Serial Audio Interface
FLEXCAN
Flexible Controller Area Network
GB
Giga Byte
Gbps
Gigabits per sec
GPIO
General Purpose Input Output
HDCP
High-bandwidth Digital Content Protection

REL 1.2
Page 8 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Acronyms
Abbreviations
HDMI
High-Definition Multimedia Interface
I2C
Inter-Integrated Circuit
IC
Integrated Circuit
IPU
Image Processing Unit
JTAG
Joint Test Action Group
Kbps
Kilobits per second
LCD
Liquid Crystal Display
LDB
LVDS Display Bridge
LVDS
Low Voltage Differential Signal
MAC
Media Access Controller
MB
Mega Byte
Mbps
Megabits per sec
MHz
Mega Hertz
MIPI
Mobile Industry CPU Interface
MLB
Media Local Bus
MMC
Multi Media Card
NC
No Connect
NPTH
Non Plated Through hole
PCB
Printed Circuit Board
PMIC
Power Management Integrated Circuit
PTH
Plated Through hole
PWM
Pulse Width Modulation
RGMII
Reduced Gigabit Media Independent Interface
ROM
Read-Only Memory
RTC
Real Time Clock
SATA
Serial Advanced Technology Attachment
SD
Secure Digital
SDIO
Secure Digital Input Output
SDRAM
Synchronous Dynamic Random Access Memory
SOM
System On Module
SPDIF
Sony/Philips Digital Interconnect Format
SPI
Serial Peripheral Interface
SSI
Synchronous Serial Interface
TMDS
Transition Minimized Differential Signalling
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
USB OTG
USB On The Go

REL 1.2
Page 9 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
1.4 Terminlogy Description
In this document, wherever Signal Type is mentioned, below terminology is used.
Table 2: Terminology
Terminology
Description
I
Input Signal
O
Output Signal
IO
Bidirectional Input/output Signal
CMOS
Complementary Metal Oxide Semiconductor Signal
LVDS
Low Voltage Differential Signal
TMDS
Transition Minimized Differential Signal
DIFF
Differential Signal
OD
Open Drain Signal
OC
Open Collector Signal
RS232
RS-232 compatible Signal
Power
Power Pin
PU
Pull Up
PD
Pull Down
NA
Not Applicable
NC
Not Connected
Important Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and
only includes the pull-ups or pull-downs implemented On-SOM.
1.5 References
i.MX6 Applications Processors Datasheet
i.MX6 Applications Processors Reference Manual
i.MX6 Applications Processors Hardware Development Guide
Qseven® Specification Version 2.0
Qseven® Design Guide

REL 1.2
Page 10 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
1.6 Important Note
In this document, wherever i.MX6 CPU signal name is mentioned, it is followed as per below format.
If CPU pin functionality name and CPU pad name is same, Signal name is mentioned as
“CPU Pad Name”
Example: SD3_DATA2
In this signal, functionality which we are using and CPU Pad name is SD3_DATA2.
If CPU pin functionality name and pad name is different, Signal name is mentioned as
“Functionality name (CPU Pad name)”
Example: UART3_RTS(SD3_RST)
In this signal, UART3_RTS is the functionality which we are using and SD3_RST is the CPU Pad name.
If CPU pin functionality is GPIO, Signal name is mentioned as
“GPIO Number_FunctionalityDescription (CPU Pad name)”
Example: GPIO7_0_SD1_CD(SD3_DAT5)
In this signal, GPIO7_0 is the GPIO number, SD1_CD (SD1 card detect) is the functionality which we are using
and SD3_DAT5 is the CPU pad name.
Note: The above naming is not applicable for other signals which are not connected to CPU.

REL 1.2
Page 11 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2. ARCHITECTURE AND DESIGN
This section provides detailed information about the i.MX6 Qseven PMIC SOM Features and Hardware architecture
with high level block diagram. Also this section provides detailed information about Qseven edge connector &
Expansion connector’s pin assignment and usage.
2.1 i.MX6 Qseven PMIC SOM Block Diagram
CPU
i.MX6
DDR3 RAM
SPI NOR Flash
eMMC
PCIe x 1
QSEVEN
PCB Edge
Connector
(230Pin)
SATA x 1
USBOTG x 1
USB Host x 4
USB Host x 1
LVDS x 2, PWM x1
HDMI x 1
Gbit Ethernet
RGMII x 1
SD/MMC (8bit) x 1
I2C x 2
SPI x 1 (2 Chip selects)
CAN x 1, Data UART x 1
WDOGn
8 GPIOs, Status & Control Signals
PCIe Bus
SATA II
3.0Gbos
USB OTG
HS PHY
USB HOST1
HS PHY
LVDS0,
LVDS1,PWM
HDMI 1.4
10/100/1000
ENET
eSDHC1
eCSPI2
CAN1,
UART5
WDOG1
GPIOs
MMC (8bit)
SPI
DDR3 (64bit)
Micro SD
Connector
SD (4bit)
Expansion
Connector1
(80Pin header)
USB 2.0 Hub
(4Port)
Gigabit
Ethernet PHY
MMDC
eCSPI1
eSDHC4
eSDHC3
Audio x 1
AUDMUX4
UART2
LCD (24bpp) x 1, MIPI-DSI x 1 DISP0,
MIPI DSI
UART1,
UART3
ESAI, SPDIF
CSI1
KPP
UART (with CTS & RTS) x 2
ESAI x 1, SPDIF x 1
Camera2 (8bit) x 1
Keypad 3x3
3Pin Header
(Optional)
SJC
iW-RainboW-G15M-i.MX6 Qseven PMIC SOM Block Diagram
MLB
MLB x 1
EIM
Memory Bus (Address/Data Muxed)
Note:
* MLB is supported only in Automotive part.
UART x 1
2Pin Power In
(Optional)
JTAG
Power to
Peripherals
5V
Debug
CSI0
Camera1 (8bit) x 1
JTAG (Optional)
(20 Pin Header)
PMIC
RS232
Transceiver
(Optional)
Dual SPDT Switch IC
(Optional)
Expansion
Connector2
(80Pin header)
MIPI CSI
MIPI-CSI x 1
UART4
UART x 1
I2C3
I2C3 x 1
Single Bit
Inverter
WDOG
Nand Flash
(Optional)
I2C1, I2C2
RTC controller
(Optional)
Figure 1:i.MX6 Qseven SOM Block Diagram

REL 1.2
Page 12 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.2 i.MX6 Qseven PMIC SOM Features
The i.MX6 Qseven PMIC SOM supports the following features.
CPU
Freescale’s i.MX6 QuadPlus/Quad/DualPlus/Dual/Duallite/Solo ARM™ Cortex-A9 based CPU @ up to
1GHz/Core
PMIC
Freescale’s MMPF0100 PMIC
Boot Switches
Boot Mode Setting Switch
Boot Media Setting Switch
Memory
1GB DDR3 RAM (Expandable)
2MB SPI NOR Flash (Expandable)
4GB eMMC Flash (Expandable)
Micro SD slot
Network & Communication
Gigabit Ethernet PHY transceiver
USB 2.0 High Speed 4-Port Hub
Qseven PCB Edge Interfaces
PCIe Gen2.0 x 1 Port
Data UART x 1 Port
Gigabit Ethernet x 1 Port (through On-SOM Gigabit Ethernet PHY transceiver)
SATA II (3.0 Gbps) x 1 Port
USB Host 2.0 x 4 Ports (through On-SOM USB 2.0 High Speed 4-port Hub)
USB OTG 2.0 x 1 Port
SD/MMC (8bit) x 1 Port
AC’97 or I2S Audio x 1 Port
LVDS x 2 Port
HDMI 1.4 x 1 Port
GPIOs x 8

REL 1.2
Page 13 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
SPI x 1 Port (with 2 Chip selects )
CAN x 1 Port
Power control & Management signal
PWM x 1 Port
WDOG
I2C x 2 Ports
Debug UART
Expansion Connector1 Interfaces
Parallel LCD –24bpp RGB x 1 Port
Dual Lane MIPI DSI
Parallel Camera1 (8bit) x 1 Port
ESAI x 1 Port
SPDIF x 1 Port
Data UART (with CTS & RTS) x 2 Ports
Expansion Connector2 Interfaces
Parallel Camera2 (8bit) x 1 Port
Four Lane MIPI CSI
Memory Bus (Address & Data Multiplexed) x 1 Port
Keypad Interface (3x3)
Data UART x 1 Port
MLB x 1 Port
Optional Features
NAND Flash
RTC Controller
PMIC OTP Header
JTAG Header
Debug UART Header for Standalone usage
Power IN Connector for Standalone usage
General Specification
Power Supply : 5V, 2A
Form Factor : 70mm X 70mm (Qseven R2.0 Specification)

REL 1.2
Page 14 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.3 i.MX6 CPU
i.MX6 Qseven PMIC SOM is based on Freescale’s i.MX6 QuadPlus/Quad/DualPlus/Dual/Duallite/Solo ARM™ Cortex-
A9 core based CPU which can operate up to 1 GHz speed/core. i.MX6 CPU is Freescale’s latest achievement in
integrated multimedia application processors which is part of growing multimedia-focused products that offers high
performance processing and are optimized for lowest power consumption. The Block Diagram of i.MX6Q/D CPU
from the Freescale’s i.MX6Q/D datasheet is shown below for your reference.
Figure 2: i.MX6Q Simplified Block Diagram
Note: Please refer the latest i.MX6 Datasheet & Reference Manual from Freescale website for Electrical
characteristics of i.MX6 Application CPU which may be revised from time to time.

REL 1.2
Page 15 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.4 PMIC
i.MX6 Qseven PMIC SOM supports Freescale’s MMPF0100 PMIC for On-SOM power management. The PMIC
provides all required power to i.MX6 CPU and all On SOM peripherals with programmable power management
solutions. This PMIC supports up to six buck converters, six linear regulators, RTC supply and coin-cell charger with
programmable output voltage, sequence and timing. i.MX6 CPU’s I2C2 interface is used for PMIC programmable. I2C
address for PMIC is 0x08.
2.5 Boot Switches
i.MX6 CPU boot process begins at Power On Reset (POR) where the hardware reset logic forces the ARM core to
begin execution starting from the on-chip boot ROM. i.MX6 CPU Boot ROM code uses the state of the internal
register BOOT_MODE [1:0] as well as the state of various eFUSEs and/or GPIO settings to determine the boot flow
behaviour of the device.
i.MX6 Qseven PMIC SOM supports two Boot switches for selecting Boot Mode setting and Boot Media setting of
i.MX6 CPU.
Boot Mode Setting Switch
Boot Media Setting Switch
Figure 3: Boot Switches

REL 1.2
Page 16 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.5.1 Boot Mode Switch
i.MX6 Qseven PMIC SOM supports two positions Boot Mode Switch (SW2) which is physically located in the top of
the PCB. This switch is used to select the boot mode setting of i.MX6 CPU as explained in the below table.
Table 3: Boot Mode Settings Truth Table
Boot Mode Setting On
i.MX6 Qseven PMIC SOM
Description
SW2 (2 Position Switch)
POS1
POS2
Image
Internal Boot Mode
(Default)
In this mode, i.MX6 boot media is
selected by GPIO Pin’s settings.
OFF
ON
Boot From eFuses
In this mode, i.MX6 boot media is
selected by i.MX6 eFUSE settings.
Note: i.MX6 eFuse setting is not
modified by iWave from silicon
shipped value.
OFF
OFF
Serial Downloader Mode
In this mode, i.MX6 boot device
can be Programmed through its
USB OTG interface using MFG Tool.
ON
ON
ON - High
OFF - Low

REL 1.2
Page 17 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.5.2 Boot Media Setting Switch
i.MX6 Qseven PMIC SOM supports eight positions Boot Media Switch (SW1) which is physically located in the top of
the PCB. This switch is used to select the boot media of i.MX6 CPU if i.MX6 CPU boot mode is selected as Internal
Boot Mode. i.MX6 Qseven PMIC SOM supports different boot media options for booting i.MX6 CPU as mentioned in
the below table.
Boot Media Setting On
i.MX6 Qseven PMIC SOM
SW1 (8 Position Switch)
POS1
POS2
POS3
POS4
POS5
POS6
POS7
POS8
Image
eCSPI1 - SPI Flash
(Default)
ON
ON
OFF
X
X
X
X
X
SD4 - 8bit eMMC
OFF
ON
ON
ON
ON
OFF
ON
OFF
SD3 - 4bit Micro SD
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
SD1 - 4bit
(Through Qseven Edge)
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
SD1 - 8bit MMC
(Through Qseven Edge)
OFF
ON
ON
OFF
OFF
OFF
ON
OFF
SATA - 3Gbps
(Through Qseven Edge)
OFF
ON
OFF
OFF
OFF
X
X
X
Note: Boot Media setting switch is not mounted in production SOMs by default.

REL 1.2
Page 18 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.6 Memory
2.6.1 DDR3 SDRAM
i.MX6 Qseven PMIC SOM by default supports 1GB DDR3 RAM memory in 64bit mode. To support this, it uses four
256MB DDR3 SDRAM ICs. These devices operate at 1.5V voltage level. Each pair of DDR3 ICs is physically located on
either side of the Qseven SOM. The RAM size can be expandable up to maximum of 4GB.
Note: By default, 512MB DDR3 with 32bit mode only supported in i.MX6 Solo CPU based Qseven PMIC SOM.
2.6.2 SPI NOR Flash
The i.MX6 Qseven PMIC SOM supports 2MB SPI NOR Flash as default boot device. This is connected to eCSPI1
controller of the i.MX6 CPU and operates at 3.3 Voltage level. The SPI flash memory is physically located on bottom
side of the Qseven SOM.
2.6.3 eMMC Flash
i.MX6 Qseven PMIC SOM supports 4GB eMMC (expandable) memory as mass storage and also can be used as boot
device. eMMC is directly connected to the uSDHC4 of the i.MX6 CPU and operating at 3.3 Voltage level. The eMMC
flash memory is physically located on topside of the Qseven SOM.
2.6.4 Micro SD Slot
i.MX6 Qseven PMIC SOM supports Micro SD slot to connect Micro SD card for Mass storage and also can be used as
Boot device. Micro SD Card Connector (J2) is directly connected to the uSDHC3 of the i.MX6 CPU. It supports card
detect feature. The main power to Micro SD Card Connector is 3.3 Voltage. Micro SD Connector is physically located
on topside of the Qseven SOM as shown below.
Figure 4: Micro SD Slot

REL 1.2
Page 19 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.7 Qseven PCB Edge Connector
Qseven PCB edge connector has standard pin out as per Qseven Specification 2.0. The interfaces which are available
at 230pin Qseven Edge connector are explained in the following sections.
Figure 5: Qseven PCB Edge Connector
Number of Pins - 230
Connector Part - Not Applicable (On Board PCB Edge connector)
Mating Connector - IMSA-18010S-230A-GN1 from IRISO
AS0B326-S78N-7F from FOXCONN
88882-2D0K from Aces
CN113-230-0001VE from Yamaichi Electronics

REL 1.2
Page 20 of 82
i.MX6 Qseven PMIC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.7.1 PCIe Interface
i.MX6 Qseven PMIC SOM supports one PCI Express Gen2.0 lane on Qseven Edge connector. i.MX6 CPU’s PCIe Express
core with integrated PHY is used for PCIe Interface which can support PCIe Gen2.0 at 5Gbps data rate and are
backward compatible to Gen1.1 at 2.5Gbps data rate. i.MX6 CPU’s PCIe PHY output is connected to Qseven Edge
connector PCIe channel 0. i.MX6 CPU’s CLK1 differential output is connected to Qseven Edge for PCIe reference
clock. Also PCIe wake input and PCIe reset output are supported on Qseven Edge connector from i.MX6 CPU GPIOs
GPIO2_6 & GPIO2_7 correspondingly.
For more details, refer Qseven Edge connector pins 155,156,157,158,179,180,181 & 182 on Table 5.
Note: Termination is required on the PCIe differential clock lines and should be placed as close as possible to the
receiver device input or PCIe connector. Connect two 49.9 Ω resistors between REFCLK- and GND & REFCLK+ and
GND. Alternately, Connect a 100 Ω resistor between REFCLK- and REFCLK+. PCIe differential transmitter lines are ac
coupled on SOM itself. For more details refer, i.MX6 Hardware Development Guide and Qseven design Guide.
2.7.2 Data UART Interface (UART5)
i.MX6 Qseven PMIC SOM supports one Data UART interface on Qseven Edge connector along with two more on
Expansion connector1 and one more on Expansion connector2. i.MX6 CPU’s UART5 controller is used for Data UART
interface on Qseven Edge connector which supports Serial RS-232NRZ mode, 9-bit RS-485 mode and IrDA mode. It is
compatible with High-speed TIA/EIA-232-F (up to 5.0 Mbit/s) with auto baud rate detection (up to 115.2 Kbit/s). It
supports 7 or 8 data bits for RS-232 characters (9 bit RS-485 format), 1 or 2 stop bits and programmable parity (even,
odd, and no parity). Also i.MX6 Qseven PMIC SOM supports hardware flow control for RTS and CTS signals.
For more details, refer Qseven Edge connector pins 171,172,177 & 178 on Table 5.
2.7.3 Gigabit Ethernet Interface
i.MX6 Qseven PMIC SOM supports one 10/100/1000 Mbps Ethernet interface on Qseven Edge connector. The MAC
is integrated in the i.MX6 CPU and connected to the external Gigabit Ethernet PHY on SOM. Since MAC and PHY are
supported on SOM itself, only Magnetics are required on the carrier board. i.MX6 Qseven PMIC SOM also supports
Link and Activity indication LED control signals to Qseven Edge.
i.MX6 Qseven PMIC SOM supports “KSZ9031RNXI” Ethernet PHY from Micrel. This PHY is interfaced with i.MX6 CPU
using RGMII interface and works at 1.8V IO voltage level. Since this PHY doesn’t require center tap supply to the
magnetics, CTREF voltage to Qseven Edge is not supported on SOM. It is recommended that center tap pins of
magnetics should be separated from one another and connected through separate 0.1uF common mode capacitors
to ground. The below table provides some of the compatible magnetics recommended by PHY Manufacturer.