Toshiba TLCS-870/C Series User manual

8 Bit Microcontroller
TLCS-870/C Series
TMP86PM29BUG

The information contained herein is subject to change without notice. 021023_D
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021023_B
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060106_Q
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For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3
of the chapter entitled Quality and Reliability Assurance/Handling Precautions. 030619_S
© 2007 TOSHIBA CORPORATION
All Rights Reserved

Page 3
TMP86PM29BUG
The Functional Differences on Products basis: TMP86CM29L, TMP86Cx29B, TMP86CH21
and TMP86Cx20
Note 1: UART and SIO can not use function synchronously because each function pins are shared.
Note 2: With TMP86CH21AUG the operating temperature (Topr) is -20 ℃to 85 ℃when the supply voltage VDD is less than 2.0V.
Note 3: TMP86C820/420 don’t have the timer/counter-6 input/output and UART input/output.
Note 4: The electrial characteristics of TMP86CM29LUG are different from that of TMP86C829/CH29/CM29B, TMP86CH21/
CH21A and TMP86C420/C820. For details, please refer to "Electrical Characteristics" in data sheet of TMP86CM29LUG.
Note 5: The operating temperature (Topr) of AD characteristics of all products (TMP86C420/C820/CH21/CH21A/C829B/CH29B/
CM29B/CM29L) is -10 ℃to 85 ℃when the supply voltage VDD is less than 2.0V. For details, please refer to "AD Conver-
sion Characteristics" in data sheet of each product.
Note 6: The characteristic of power supply current differs in each product. For details, please refer to "Electirical Characteristics"
in data sheet of each product.
Products name TMP86CM29L TMP86C829B TMP86CH29B
TMP86CM29B
TMP86CH21
TMP86CH21A TMP86C420 TMP86C820
ROM 32 K bytes C829: 8K bytes
CH29: 16K bytes
CM29: 32K bytes 16K bytes C420: 4K bytes
C820: 8K bytes
RAM 1.5K bytes C829: 512bytes
CH29: 1.5K bytes
CM29: 1.5K bytes 512bytes 256bytes
I/O port 39 pins
Minumum command
execution time 0.25µsec at 16MHz
Supply Voltage
1.8V to 3.6V at 8.0MHz/
32.768kHz
2.7V to 3.6V at 16MHz/
32.768kHz
(Note4)
1.8V to 5.5V at 4.2MHz/32.768kHz
2.7V to 5.5V at 8.0MHz/32.768kHz
4.5V to 5.5V at 16MHz/32.768kHz
18-bit Timer counter 1ch
(ECIN input is both edge or single edge) 1ch (ECIN input is single edge)
8-bit Timer counter 4ch 2ch
Time base timer 1ch
Watch dog timer 1ch
UART/SIO 1ch (Note1) N.A.
SIO N.A 1ch
Key-on wakeup 4ch
A/D converter 10-bit A/D: 8ch 8-bit A/D: 8ch
LCD driver 32SEG x 4COM
Operating Temperature -40 to 85 ℃-40 to 85 ℃(Note2) -40 to 85 ℃
Package(Body size) LQFP64(10x10mm) QFP64(14x14mm)
LQFP64(10x10mm)
Package
(P-QFP64-1010-0.80C) N.A TMP86C829BFG
TMP86CH29BFG
TMP86CM29BFG TMP86CH21FG TMP86C420FG
TMP86C820FG
Package
(P-LQFP64-1010-0.50E) N.A TMP86C829BUG
TMP86CH29BUG
TMP86CM29BUG TMP86CH21UG TMP86C420UG
TMP86C820UG
Package
(P-LQFP64-1010-0.50D) TMP86CM29LUG N.A. TMP86CH21AUG N.A.

TMP86PM29BUG
The Functional Differences on Products basis: TMP86C829B/CH29B/CM29B/PM29A/
PM29B/FM29/CM29L.
Note 1: UART and SIO can not use function synchronously because each function pins are shared.
Note 2: An emulation chip (TMP86C929AXB) can’t emulate the Flash memory functions, CPU wait and serial PROM mode.
Therefore, if the software which includes Flash memory function or CPU wait is executed in TMP86C929AXB, the opera-
tion might be different from TMP86FM29/CM29L.
Note 3: The operating temperature (Topr) of AD characteristics of all products (TMP86C829B/CH29B/CM29B/PM29A/PM29B/
FM29/CM29L) is -10℃to 85℃when the supply voltage VDD is less than 2.0V. For details, please refer to "AD Conversion
Characteristics" in data sheet of each product.
Note 4: The typical value of high and low frequency feedback resistor in TMP86FM29/CM29L are different from that of the other
products. For details, please refer to "Input/Output Circuitry" in data sheet of each product.
Note 5: The characteristic of power supply current differs in each product. For details, please refer to "Electirical Characteristics"
in data sheet of each product.
Note 6: The recommended operating condition of serial PROM mode in TMP86FM29 is different from MCU mode. Fore details,
please refer to "Electirical Characteristics" in data sheet of each product.
Products name TMP86C829B TMP86CH29B TMP86CM29B TMP86PM29A
TMP86PM29B TMP86FM29 TMP86CM29L
ROM 8K bytes
(MASK) 16K bytes (MASK) 32K bytes (MASK) 32K bytes (OTP) 32K bytes (FLASH) 32K bytes (MASK)
RAM 512 bytes 1.5K bytes
DBR 128 bytes
(Flash memory control/status registers <EEPCR, EEPSR> are non-available.)
128 bytes
(Flash memory control/status registers
<EEPCR, EEPSR> are available.)
I/O port 39 pins
Large current output
(Nch) port 4 pins (Sink-open-drain output) 20 mA (Typ) 4 pins (Sink-open-drain output) 6 mA (Typ)
Interrupt sources External: 5 Internal: 14
Timer/Counter 18bit Timer/Counter: 1ch
8bit Timer/Counter: 4ch
UART/SIO 1ch (Note1)
Key-on wakeup 4ch
AD converter 10bit x 8ch (Note3)
LCD driver 32SEG x 4COM
Circuitry of TEST pin
Feedback resistor in
High- frequency circuit
(Note4) Rf= 1.2 M Ω(Typ) Rf= 3 M Ω(Typ)
Feedback resistor in
Low- frequency circuit
(Note4) Rf= 6 M Ω(Typ) Rf= 20 M Ω(Typ)
Emulation Chip
(Note2) TMP86C929AXB
Package P-QFP64-1414-0.80C
P-LQFP64-1010-0.50E P-LQFP64-1010- 0.50D
Operating voltage
(Note 5)
1.8V to 5.5V at 4.2MHz/32.768kHz
2.7V to 5.5V at 8.0MHz/32.768kHz
4.5V to 5.5V at 16MHz/32.768kHz
1.8V to 3.6V at 8.0MHz/32.768kHz
2.7V to 3.6V at 16MHz/32.768kHz
(Note 6)
VDD
RIN
R
R
No Pull down
Resistor
No Protection
Diode (VDD side)
VDD
RIN
R

Page 5
TMP86PM29BUG
Note 1: TMP86FM29 has a CPU wait function which is a warming up (CPU halt) of CPU for stabilizing of power supply of
Flash memory. Even though TMP86CM29L doesn’t have a Flash memory, the CPU wait function is inserted to
keep the compatibility with Flash product (TMP86FM29). During the CPU wait period except RESET, CPU is
halted but peripheral functions are not halted. Therefore, if the interrupt occurs during the CPU wait period, the
interrupt latch (IL) is set and when IMF has been set to "1", the interrupt service routine might be executed after
CPU wait period . For details, please refer to "Flash Memory" in TMP86FM29 data sheet. TMP86FM29 (Flash
product) should be used as non-volatile product to confirm the software of TMP86CM29L because of the above
reason. And TMP86PM29A/PM29B (OTP product) should be used as non-volatile product to confirm the software
of TMP86C829B/CH29B/CM29B.
Note 1: TMP86FM29/CM29L can't use LCD panel which is driven by 5V because the maximum recommended voltage is
3.6V. Therefore, the voltage level of V3 pin always should be under 3.6V.
Note 2: The operating temperature of TMP86FM29/CM29L in Type-1 and Type-2 is -10 ℃to 85 ℃. For details, please
refer to "LCD Driver" and "Electrical Characteristics" in data sheet.
Note 3: The operating temperature of TMP86C829B/CH29B/CM29B in all Types (Type 1 to 5) is -40℃to 85℃. However,
there is a voltage level limitation of V3 and VDD pin in each type. For details, please refer to "LCD Driver" and
"Electrical Characteristics" in data sheet.
Condition Wait Time‘ Halt/Operate
CPU Peripherals
After reset release 210/fc [s] Halt Halt
Changing from STOP mode to NORMAL mode
(at EEPCR<MNPWDW>="1" 210/fc [s] Halt Operate
Changing from STOP mode to SLOW mode
(at EEPCR<MNPWDW>="1") 23/fc [s] Halt Operate
Changing from IDLE0/1/2 mode to NORMAL mode
(at EEPCR<MNPWDW>="0") 210/fc [s] Halt Operate
Changing from SLEEP0/1/2 mode to SLOW mode
(at EEPCR<MNPWDW>="0") 23/fc [s] Halt Operate
Type-1
(Reference pin =V1) Type-2 (Reference pin =V1) Type-3 (Reference pin =V2) Type-4 (Reference pin =V3) Type-5 (Reference pin =V3)
V3
V2
V1
C1
C0
VDD
VSS
Reference
Voltage
C
CC
V3
V2
V1
C1
C0
VDD
VSS
Reference
Voltage
C
C
C
V3
V2
V1
C1
C0
VDD
VSS
Reference
Voltage
C
C
C
C
V3
V2
V1
C1
C0
VDD
VSS
Reference
Voltage
C
C
C
C
V3
V2
V1
C1
C0
VDD
VSS
C
C
C
C

TMP86PM29BUG

Revision History
Date Revision
2007/10/11 1 First Release
2008/8/29 2 Contents Revised

Caution in Setting the UART Noise Rejection Time
When UART is used, settings of RXDNC are limited depending on the transfer clock specified by BRG. The com-
bination "O" is available but please do not select the combination "–".
The transfer clock generated by timer/counter interrupt is calculated by the following equation :
Transfer clock [Hz] = Timer/counter source clock [Hz] ÷TTREG set value
BRG setting Transfer
clock [Hz]
RXDNC setting
00
(No noise rejection)
01
(Reject pulses shorter
than 31/fc[s] as noise)
10
(Reject pulses shorter
than 63/fc[s] as noise)
11
(Reject pulses shorter
than 127/fc[s] as
noise)
000 fc/13 O O O –
110
(When the transfer clock gen-
erated by timer/counter inter-
rupt is the same as the right
side column)
fc/8 O – – –
fc/16 O O – –
fc/32OOO–
ThesettingexcepttheaboveOOOO

i
Table of Contents
TMP86PM29BUG
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Pin Names and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. Operational Description
2.1 CPU Core Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.1 Memory Address Map............................................................................................................................... 9
2.1.2 Program Memory (OTP) ........................................................................................................................... 9
2.1.3 Data Memory (RAM)................................................................................................................................. 9
2.2 System Clock Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.1 Clock Generator...................................................................................................................................... 10
2.2.2 Timing Generator.................................................................................................................................... 12
2.2.2.1 Configuration of timing generator
2.2.2.2 Machine cycle
2.2.3 Operation Mode Control Circuit .............................................................................................................. 13
2.2.3.1 Single-clock mode
2.2.3.2 Dual-clock mode
2.2.3.3 STOP mode
2.2.4 Operating Mode Control ......................................................................................................................... 18
2.2.4.1 STOP mode
2.2.4.2 IDLE1/2 mode and SLEEP1/2 mode
2.2.4.3 IDLE0 and SLEEP0 modes (IDLE0, SLEEP0)
2.2.4.4 SLOW mode
2.3 Reset Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.3.1 External Reset Input ............................................................................................................................... 31
2.3.2 Address trap reset .................................................................................................................................. 32
2.3.3 Watchdog timer reset.............................................................................................................................. 32
2.3.4 System clock reset.................................................................................................................................. 32
3. Interrupt Control Circuit
3.1 Interrupt latches (IL15 to IL2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.2 Interrupt enable register (EIR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.2.1 Interrupt master enable flag (IMF) .......................................................................................................... 36
3.2.2 Individual interrupt enable flags (EF15 to EF4) ...................................................................................... 36
3.3 Interrupt Source Selector (INTSEL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.4 Interrupt Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.4.1 Interrupt acceptance processing is packaged as follows........................................................................ 39
3.4.2 Saving/restoring general-purpose registers............................................................................................ 40
3.4.2.1 Using PUSH and POP instructions

ii
3.4.2.2 Using data transfer instructions
3.4.3 Interrupt return........................................................................................................................................ 42
3.5 Software Interrupt (INTSW). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.5.1 Address error detection .......................................................................................................................... 43
3.5.2 Debugging .............................................................................................................................................. 43
3.6 Undefined Instruction Interrupt (INTUNDEF). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.7 Address Trap Interrupt (INTATRAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.8 External Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
4. Special Function Register (SFR)
4.1 SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
4.2 DBR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5. I/O Ports
5.1 Port P1 (P17 to P10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.2 Port P2 (P22 to P20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.3 Port P3 (P33 to P30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5.4 Port P5 (P57 to P50) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.5 Port P6 (P67 to P60) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
5.6 Port P7 (P77 to P70) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
6. Watchdog Timer (WDT)
6.1 Watchdog Timer Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
6.2 Watchdog Timer Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
6.2.1 Malfunction Detection Methods Using the Watchdog Timer................................................................... 60
6.2.2 Watchdog Timer Enable ......................................................................................................................... 61
6.2.3 Watchdog Timer Disable ........................................................................................................................ 62
6.2.4 Watchdog Timer Interrupt (INTWDT)...................................................................................................... 62
6.2.5 Watchdog Timer Reset........................................................................................................................... 63
6.3 Address Trap. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
6.3.1 Selection of Address Trap in Internal RAM (ATAS)................................................................................ 64
6.3.2 Selection of Operation at Address Trap (ATOUT).................................................................................. 64
6.3.3 Address Trap Interrupt (INTATRAP)....................................................................................................... 64
6.3.4 Address Trap Reset................................................................................................................................ 65
7. Time Base Timer (TBT)
7.1 Time Base Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
7.1.1 Configuration .......................................................................................................................................... 67
7.1.2 Control .................................................................................................................................................... 67
7.1.3 Function.................................................................................................................................................. 68
7.2 Divider Output (DVO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
7.2.1 Configuration .......................................................................................................................................... 69
7.2.2 Control .................................................................................................................................................... 69
8. 18-Bit Timer/Counter (TC1)

iii
8.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
8.2 Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
8.3 Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
8.3.1 Timer mode............................................................................................................................................. 75
8.3.2 Event Counter mode............................................................................................................................... 76
8.3.3 Pulse Width Measurement mode............................................................................................................ 77
8.3.4 Frequency Measurement mode.............................................................................................................. 78
9. 8-Bit TimerCounter (TC3, TC4)
9.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
9.2 TimerCounter Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
9.3 Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
9.3.1 8-Bit Timer Mode (TC3 and 4)................................................................................................................ 87
9.3.2 8-Bit Event Counter Mode (TC3, 4) ........................................................................................................ 88
9.3.3 8-Bit Programmable Divider Output (PDO) Mode (TC3, 4)..................................................................... 88
9.3.4 8-Bit Pulse Width Modulation (PWM) Output Mode (TC3, 4).................................................................. 91
9.3.5 16-Bit Timer Mode (TC3 and 4).............................................................................................................. 93
9.3.6 16-Bit Event Counter Mode (TC3 and 4) ................................................................................................ 94
9.3.7 16-Bit Pulse Width Modulation (PWM) Output Mode (TC3 and 4).......................................................... 94
9.3.8 16-Bit Programmable Pulse Generate (PPG) Output Mode (TC3 and 4)............................................... 97
9.3.9 Warm-Up Counter Mode......................................................................................................................... 99
9.3.9.1 Low-Frequency Warm-up Counter Mode
(NORMAL1 →NORMAL2 →SLOW2 →SLOW1)
9.3.9.2 High-Frequency Warm-Up Counter Mode
(SLOW1 →SLOW2 →NORMAL2 →NORMAL1)
10. 8-Bit TimerCounter (TC5, TC6)
10.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
10.2 TimerCounter Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
10.3 Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
10.3.1 8-Bit Timer Mode (TC5 and 6)............................................................................................................ 106
10.3.2 8-Bit Event Counter Mode (TC6) ........................................................................................................ 107
10.3.3 8-Bit Programmable Divider Output (PDO) Mode (TC6)..................................................................... 107
10.3.4 8-Bit Pulse Width Modulation (PWM) Output Mode (TC6).................................................................. 110
10.3.5 16-Bit Timer Mode (TC5 and 6).......................................................................................................... 112
10.3.6 16-Bit Pulse Width Modulation (PWM) Output Mode (TC5 and 6)...................................................... 113
10.3.7 16-Bit Programmable Pulse Generate (PPG) Output Mode (TC5 and 6)........................................... 116
10.3.8 Warm-Up Counter Mode..................................................................................................................... 118
10.3.8.1 Low-Frequency Warm-up Counter Mode
(NORMAL1 →NORMAL2 →SLOW2 →SLOW1)
10.3.8.2 High-Frequency Warm-Up Counter Mode
(SLOW1 →SLOW2 →NORMAL2 →NORMAL1)
11. Asynchronous Serial interface (UART )
11.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
11.2 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
11.3 Transfer Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
11.4 Transfer Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
11.5 Data Sampling Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
11.6 STOP Bit Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
11.7 Parity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
11.8 Transmit/Receive Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
11.8.1 Data Transmit Operation .................................................................................................................... 126

iv
11.8.2 Data Receive Operation ..................................................................................................................... 126
11.9 Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
11.9.1 Parity Error.......................................................................................................................................... 127
11.9.2 Framing Error...................................................................................................................................... 127
11.9.3 Overrun Error...................................................................................................................................... 127
11.9.4 Receive Data Buffer Full..................................................................................................................... 128
11.9.5 Transmit Data Buffer Empty ............................................................................................................... 128
11.9.6 Transmit End Flag .............................................................................................................................. 129
12. Synchronous Serial Interface (SIO)
12.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
12.2 Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
12.3 Serial clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
12.3.1 Clock source....................................................................................................................................... 133
12.3.1.1 Internal clock
12.3.1.2 External clock
12.3.2 Shift edge............................................................................................................................................ 135
12.3.2.1 Leading edge
12.3.2.2 Trailing edge
12.4 Number of bits to transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
12.5 Number of words to transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
12.6 Transfer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
12.6.1 4-bit and 8-bit transfer modes............................................................................................................. 136
12.6.2 4-bit and 8-bit receive modes ............................................................................................................. 138
12.6.3 8-bit transfer / receive mode............................................................................................................... 139
13. 10-bit AD Converter (ADC)
13.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
13.2 Register configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
13.3 Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
13.3.1 Software Start Mode........................................................................................................................... 145
13.3.2 Repeat Mode ...................................................................................................................................... 145
13.3.3 Register Setting ................................................................................................................................ 146
13.4 STOP/SLOW Modes during AD Conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . 147
13.5 Analog Input Voltage and AD Conversion Result . . . . . . . . . . . . . . . . . . . . . . . 148
13.6 Precautions about AD Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
13.6.1 Analog input pin voltage range ........................................................................................................... 149
13.6.2 Analog input shared pins .................................................................................................................... 149
13.6.3 Noise Countermeasure....................................................................................................................... 149
14. Key-on Wakeup (KWU)
14.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
14.2 Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
14.3 Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
15. LCD Driver
15.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
15.2 Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
15.2.1 LCD driving methods .......................................................................................................................... 155

v
15.2.2 Frame frequency................................................................................................................................. 156
15.2.3 Driving method for LCD driver ............................................................................................................ 157
15.2.3.1 When using the booster circuit (LCDCR<BRES>="1")
15.2.3.2 When using an external resistor divider (LCDCR<BRES>="0")
15.3 LCD Display Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
15.3.1 Display data setting ............................................................................................................................ 159
15.3.2 Blanking.............................................................................................................................................. 160
15.4 Control Method of LCD Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
15.4.1 Initial setting........................................................................................................................................ 161
15.4.2 Store of display data........................................................................................................................... 161
15.4.3 Example of LCD drive output.............................................................................................................. 164
16. OTP operation
16.1 Operating mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
16.1.1 MCU mode.......................................................................................................................................... 169
16.1.1.1 Program Memory
16.1.1.2 Data Memory
16.1.1.3 Input/Output Circuiry
16.1.2 PROM mode....................................................................................................................................... 171
16.1.2.1 Programming Flowchart (High-speed program writing)
16.1.2.2 Program Writing using a General-purpose PROM Programmer
17. Input/Ouput Circuitry
17.1 Control Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
17.2 Input/Output Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
18. Electrical Characteristics
18.1 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
18.2 Recommended Operating Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
18.3 DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
18.4 AD Conversion Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
18.5 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
18.6 Timer Counter 1 input (ECIN) Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 182
18.7 DC Characteristics, AC Characteristics (PROM mode). . . . . . . . . . . . . . . . . . . 183
18.7.1 Read operation in PROM mode.......................................................................................................... 183
18.7.2 Program operation (High-speed) (Topr = 25 ±5°C) ........................................................................... 184
18.8 Recommended Oscillating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
18.9 Handling Precaution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
19. Package Dimensions
This is a technical document that describes the operating functions and electrical
specifications of the 8-bit microcontroller series TLCS-870/C (LSI).

vi

Page 1
TMP86PM29BUG
CMOS 8-Bit Microcontroller
• The information contained herein is subject to change without notice. 021023_D
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can
malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when
utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations
in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for
Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equip-
ment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither
intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of
which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments,
airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instru-
ments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's
own risk. 021023_B
• The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or
sale are prohibited under any applicable laws and regulations. 060106_Q
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by impli-
cation or otherwise under any patents or other rights of TOSHIBA or the third parties. 070122_C
• The products described in this document are subject to foreign exchange and foreign trade control laws. 060925_E
• For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality and
Reliability Assurance/Handling Precautions. 030619_S
TMP86PM29BUG
The TMP86PM29BUG is a single-chip 8-bit high-speed and high-functionality microcomputer incorporating
32768 bytes of One-Time PROM. It is pin-compatible with the TMP86C829/CH29/CM29BUG (Mask ROM ver-
sion). The TMP86PM29BUG can realize operations equivalent to those of the TMP86C829/CH29/CM29BUG by
programming the on-chip PROM.
1.1 Features
1. 8-bit single chip microcomputer TLCS-870/C series
- Instruction execution time :
0.25 µs (at 16 MHz)
122 µs (at 32.768 kHz)
- 132 types & 731 basic instructions
2. 19interrupt sources (External : 5 Internal : 14)
3. Input / Output ports (39 pins)
Large current output: 4pins (Typ. 20mA), LED direct drive
4. Watchdog Timer
5. Prescaler
- Time base timer
- Divider output function
6. 18-bit Timer/Counter : 1ch
- Timer Mode
- Event Counter Mode
- Pulse Width Measurement Mode
- Frequency Measurement Mode
Product No. ROM
(EPROM) RAM Package MaskROM MCU Emulation Chip
TMP86PM29BUG 32768
bytes 1536 bytes LQFP64-P-1010-0.50E TMP86C829/CH29/
CM29BUG TMP86C929AXB

Page 2
1.1 Features TMP86PM29BUG
7. 8-bit timer counter : 4 ch
- Timer, Event counter, Programmable divider output (PDO),
Pulse width modulation (PWM) output,
Programmable pulse generation (PPG) modes
8. 8-bit UART/SIO : 1 ch
9. 10-bit successive approximation type AD converter
- Analog input: 8 ch
10.Key-on wakeup : 4 ch
11. LCD driver/controller
Built-in voltage booster for LCD driver With display memory
LCD direct drive capability (MAX 32 seg × 4 com)
1/4,1/3,1/2duties or static drive are programmably selectable
12. Clock operation
Single clock mode
Dual clock mode
13. Low power consumption operation
STOP mode: Oscillation stops. (Battery/Capacitor back-up.)
SLOW1 mode: Low power consumption operation using low-frequency clock.(High-frequency clock
stop.)
SLOW2 mode: Low power consumption operation using low-frequency clock.(High-frequency clock
oscillate.)
IDLE0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using high fre-
quency clock. Release by falling edge of the source clock which is set by TBTCR<TBTCK>.
IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interru-
puts(CPU restarts).
IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by inter-
ruputs. (CPU restarts).
SLEEP0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using low fre-
quency clock.Release by falling edge of the source clock which is set by TBTCR<TBTCK>.
SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interru-
put.(CPU restarts).
SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by
interruput.
14.Wide operation voltage:
4.5 V to 5.5 V at 16MHz /32.768 kHz
2.7 V to 5.5 V at 8MHz /32.768 kHz
1.8 V to 5.5 V at 4.2MHz /32.768 kHz

Page 3
TMP86PM29BUG
1.2 Pin Assignment
Figure 1-1 Pin Assignment
VSS
XOUT
TEST
VDD
(XTIN) P21
(XTOUT) P22
RESET
(STOP/INT5) P20
(AIN0) P60
(ECNT/AIN2) P62
(STOP2/AIN4) P64
(INT0/AIN3) P63
(STOP3/AIN5) P65 (STOP4/AIN6) P66
1 2 3 4 5 6 7 8 9
10
11
12 13 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
P15(SEG26/RXD/SI)
P17(SEG24/SCK)
P50(SEG23)
P52(SEG21)
P51(SEG22)
P54(SEG19)
P53(SEG20)
P16(SEG25/TXD/SO)
SEG3 SEG4 SEG5 SEG6 SEG7 P77 (SEG8) P76 (SEG9) P75 (SEG10)
(ECIN/AIN1) P61
XIN
P67(AIN7/STOP5)
AVDD
P10(SEG31)
P11(SEG30)
P14(SEG27/INT3)
P12(SEG29/INT1)
VAREF
P13(SEG28/INT2)
P74 (SEG11) P73 (SEG12) P72 (SEG13) P71 (SEG14) P70 (SEG15) P57 (SEG16) P56 (SEG17) P55 (SEG18)
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V3
V2
V1
C1
C0
(DVO) P30
(TC3/PDO3/PWM3) P31
(TC4/PDO4/PWM4/PPG4) P32
(TC6/PDO6/PWM6/PPG6) P33

Page 4
1.3 Block Diagram TMP86PM29BUG
1.3 Block Diagram
Figure 1-2 Block Diagram

Page 5
TMP86PM29BUG
1.4 Pin Names and Functions
The TMP86PM29BUG has MCU mode and PROM mode. Table 1-1 shows the pin functions in MCU mode. The
PROM mode is explained later in a separate chapter.
Table 1-1 Pin Names and Functions(1/3)
Pin Name Pin Number Input/Output Functions
P17
SEG24
SCK 27 IO
O
IO
PORT17
LCD segment output 24
Serial Clock I/O
P16
SEG25
TXD
SO
26
IO
O
O
O
PORT16
LCD segment output 25
UART data output
Serial Data Output
P15
SEG26
RXD
SI
25
IO
O
I
I
PORT15
LCD segment output 26
UART data input
Serial Data Input
P14
SEG27
INT3 24 IO
O
I
PORT14
LCD segment output 27
External interrupt 3 input
P13
SEG28
INT2 23 IO
I
I
PORT13
LCD segment output 28
External interrupt 2 input
P12
SEG29
INT1 22 IO
O
I
PORT12
LCD segment output 29
External interrupt 1 input
P11
SEG30 21 IO OPORT11 LCD segment output 30
P10
SEG31 20 IO
OPORT10 LCD segment output 31
P22
XTOUT 7IO O
PORT22
Resonator connecting pins(32.768kHz) for inputting external
clock
P21
XTIN 6IO I
PORT21
Resonator connecting pins(32.768kHz) for inputting external
clock
P20
INT5
STOP 9IO
I
I
PORT20
External interrupt 5 input
STOP mode release signal input
P33
PDO6/PWM6/PPG6
TC6 64 IO
O
I
PORT33
PDO6/PWM6/PPG6 output
TC6 input
P32
PDO4/PWM4/PPG4
TC4 63 IO
O
I
PORT32
PDO4/PWM4/PPG4 output
TC4 input
P31
PDO3/PWM3
TC3 62 IO
O
I
PORT31
PDO3/PWM3 output
TC3 input
P30
DVO 61 IO
OPORT30 Divider Output
P57
SEG16 35 IO
OPORT57 LCD segment output 16